MCL908QY2CDTE Freescale Semiconductor, MCL908QY2CDTE Datasheet - Page 34

IC MCU 8BIT 1.5K FLASH 16-TSSOP

MCL908QY2CDTE

Manufacturer Part Number
MCL908QY2CDTE
Description
IC MCU 8BIT 1.5K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCL908QY2CDTE

Core Processor
HC08
Core Size
8-Bit
Speed
2MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Memory
2.6.3 FLASH Mass Erase Operation
Use the following procedure to erase the entire FLASH memory to read as a 1:
A mass erase will erase the internal oscillator trim value at $FFC0.
2.6.4 FLASH Program Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, or $XXE0. Use the
following step-by-step procedure to program a row of FLASH memory
Figure 2-4
1. When in monitor mode, with security sequence failed (see
2. The time between each FLASH address change, or the time between the last FLASH address programmed to clearing PGM
34
10. After time, t
of any FLASH address.
bit, must not exceed the maximum programming time, t
1. Set both the ERASE bit and the MASS bit in the FLASH control register.
2. Read the FLASH block protect register.
3. Write any data to any FLASH address
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE and MASS bits.
8. Wait for a time, t
9. Clear the HVEN bit.
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
2. Read the FLASH block protect register.
3. Write any data to any FLASH location within the address range desired.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Write data to the FLASH address being programmed
address and data for programming.
shows a flowchart of the programming algorithm.
Mass erase is disabled whenever any block is protected (FLBPR does not
equal $FF).
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order as shown, but other unrelated operations
may occur between the steps.
Only bytes which are currently $FF may be programmed.
RCV
(typical 1 µs), the memory can be accessed in read mode again.
NVS
MErase
NVH
NVS
PGS
(minimum 10 µs).
(minimum 10 µs).
(minimum 100 µs).
(minimum 5 µs).
(minimum 4 ms).
MC68HLC908QY/QT Family Data Sheet, Rev. 3
(1)
CAUTION
PROG
within the FLASH memory address range.
NOTE
NOTE
NOTE
15.3.2
maximum.
Security), write to the FLASH block protect register instead
(2)
.
Freescale Semiconductor

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