MCL908QY2CDTE Freescale Semiconductor, MCL908QY2CDTE Datasheet - Page 54

• Manufacturer Part Number: MCL908QY2CDTE
• Description: IC MCU 8BIT 1.5K FLASH 16-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCL908QY2CDTE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 2MHz
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Configuration Register (CONFIG)
IRQPUD — IRQ Pin Pullup Control Bit
IRQEN — IRQ Pin Function Selection Bit
OSCOPT1 and OSCOPT0 — Selection Bits for Oscillator Option
RSTEN — RST Pin Function Selection
COPRS (Out of STOP Mode) — COP Reset Period Selection Bit
COPRS (In STOP Mode) — Auto Wakeup Period Selection Bit
LVISTOP — LVI Enable in Stop Mode Bit
LVIRSTD — LVI Reset Disable Bit
54
(0, 0) Internal oscillator
(0, 1) External oscillator
(1, 0) External RC oscillator
(1, 1) External XTAL oscillator
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
LVIRSTD disables the reset signal from the LVI module. Unlike other configuration bits, the LVIRSTD
can be written at any time.
1 = Internal pullup is disconnected
0 = Internal pullup is connected between IRQ pin and V
1 = Interrupt request function active in pin
0 = Interrupt request function inactive in pin
1 = Reset function active in pin
0 = Reset function inactive in pin
1 = COP reset short cycle = 8176 × BUSCLKX4
0 = COP reset long cycle = 262,128 × BUSCLKX4
1 = Auto wakeup short cycle = 512 × INTRCOSC
0 = Auto wakeup long cycle = 16,384 × INTRCOSC
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets disabled
0 = LVI module resets enabled
Address: $001F
The RSTEN bit is cleared by a power-on reset (POR) only. Other resets will
leave this bit unaffected.
Reset:
POR:
Read:
Write:
U = Unaffected
COPRS
Bit 7
0
0
Figure 5-2. Configuration Register 1 (CONFIG1)
LVISTOP
MC68HLC908QY/QT Family Data Sheet, Rev. 3
6
0
0
LVIRSTD
5
0
0
LVIPWRD LVDLVR
NOTE
4
0
0
U
3
0
DD
SSREC
2
0
0
STOP
1
0
0
Freescale Semiconductor
COPD
Bit 0
0
0