M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 121
Manufacturer Part Number
IC M32C MCU FLASH 512K 144LQFP
Renesas Electronics America
Specifications of M30845FJGP#U3
CAN, I²C, IEBus, SIO, UART/USART
DMA, PWM, WDT
Number Of I /o
Program Memory Size
512KB (512K x 8)
Program Memory Type
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
A/D 34x10b, D/A 2x8b
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Renesas Electronics America
9.5.2 Wait Mode
Switch the CPU clock after the clock to be switched to stabilize. Sub clock oscillation will take longer
stabilize. Wait, by program, until the clock stabilizes directly after turning the microcomputer on or exiting
To switch the on-chip oscillator clock to the main clock, enter medium-speed mode (divide-by-8) after the
main clock is divided by eight in on-chip oscillator mode (the MCD4 to MCD0 bits in the MCD register are
set to "01000
Do not enter on-chip oscillator mode or on-chip oscillator low-power consumption mode from low-speed
mode or low-power consumption mode and vice versa.
In wait mode, the CPU clock stops running. The CPU and watchdog timer, operated by the CPU clock,
also stop. When the PM22 bit in the PM2 register is set to "1" (on-chip oscillator clock as watchdog timer
count source), the watchdog timer continues operating. Because the main clock, sub clock and on-chip
oscillator clock continue running, peripheral functions using these clocks also continue operating.
18.104.22.168 Peripheral Function Clock Stop Function
22.214.171.124 Entering Wait Mode
2. Contact your oscillator manufacturer for oscillation stabilization time.
If the CM02 bit in the CM0 register is set to "1" (peripheral function clock stops in wait mode), f
tion can be reduced. f
If wait mode is entered after setting the CM02 bit to "1", set the MCD4 to MCD0 bits in the MCD
register to be the 10-MHz or less CPU clock flequency after dividing the main clock.
Enter wait mode after setting the followings.
• Initial Setting
• Before Entering Wait Mode
• After Exiting Wait Mode
(when peripheral clock is selected as a count source), and f
Set each interrupt priority level after setting the exit priority level, required to exit wait mode and
controlled by the RLVL2 to RLVL0 bits in the RLVL register, to "7".
(1) Set the I flag to "0"
(2) Set the interrupt priority level of the interrupt being used to exit wait mode
(3) Set the interrupt priority levels of the interrupts, not being used to exit wait mode, to "0"
(4) Set IPL in the FLG register. Then set the exit priority level to the same level as IPL
(5) Set the PRC0 bit in the PRCR register to "1"
(6) If the CPU clock source is the PLL clock, set the CM17 bit in the CM1 register to "0" (main clock)
(7) Set the I flag to "1"
(8) Execute the WAIT instruction
Set the exit priority level to "7" as soon as exiting wait mode.
do not stop running.
and PLC07 bit in the PLC0 register to "0" (PLL off)
Interrupt priority level of the interrupt used to exit wait mode > IPL = the exit priority level
, when X
clock or on-chip oscillator clock is selected as a count source, and
stop in wait mode. Power consump-
9. Clock Generation Circuit