M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 240
![IC M32C MCU FLASH 512K 144LQFP](/photos/12/31/123141/m30845fjgp_u3_sml.jpg)
M30845FJGP#U3
Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Specifications of M30845FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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3
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2
Figure 17.19 I
0
C
1
9
SDAi
SCLi
0 .
8 /
CLK
B
i=0 to 4
NOTES:
IICM : Bit in the UiSMR register
IICM2 : Bit in the UiSMR2 register
0
1
1. Set the PSj (j=0,1,3), PSLj or PSC register to determine.
4
0
i
3
G
J
6
u
o r
0 -
. l
u
0
1
, 7
0
p
1
(
2
M
0
2
C Mode Block Diagram
0
3
Noise
Filter
Noise
Filter
5
2
Noise
Filter
C
8 /
(Note1)
Page 217
, 4
M
(Note 1)
(Note 1)
3
UARTi
Falling edge
detect
2
Timer
I/O
C
UARTi
IICM=1
0
I/O
1
f o
8 /
IICM
IICM=0
4
4
UARTi
D
Detects Start Condition
Detects Stop Condition
) T
IICM
9
T
5
SDHI
Q
Timer
I/O
1
0
1
0
LSYN bit
Delay Circuit
IICM
ALS
R
Arbitration
Data Register
Internal Clock
External Clock
Port reading
* When the IICM bit is set to "1", port pin can be read
regardless of the direction register being set to "1".
Q
SWC2
R
S
Transmit Register
S
R
CLK
Control
Q
Receive Register
UARTi
Falling Edge of 9th Pulse
Bus
busy
UARTi
UARTi
SWC
9th Pulse
Bus Conflict
Detect
D
D
T
T
Q
Q
IICM=0 or
IICM2=1
IICM=0 or IICM2=1
ACK
IICM=1 and
IICM2=0
IICM=1 and
IICM2=0
1
0
IICM
17. Serial I/O (Special Function)
NACK
To DMA
To DMA
Bus Conflict
Start Condition Detect
Stop Condition Detect
Interrupt Request
UARTi Reception
ACK Interrupt Request
DMA Request
UARTi Transmission
NACK Interrupt
Request
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