ATTINY2313A-MUR Atmel, ATTINY2313A-MUR Datasheet - Page 167
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ATTINY2313A-MUR
Manufacturer Part Number
ATTINY2313A-MUR
Description
MCU AVR 2K FLASH 20MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY2313A-MU.pdf
(270 pages)
Specifications of ATTINY2313A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY2313A-MUR
Manufacturer:
LT
Quantity:
4 439
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17. Analog Comparator
17.1
17.1.1
8246A–AVR–11/09
Register Description
ACSR – Analog Comparator Control and Status Register
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in
Figure 17-1. Analog Comparator Block Diagram
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog
Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog Compar-
ator. When the bandgap reference is used as input to the Analog Comparator, it will take a
certain time for the voltage to stabilize. If not stibilized, the first conversion may give a wrong
value.
• Bit 5 – ACO: Analog Comparator Output
The output of the Analog Comparator is synchronized and then directly connected to ACO. The
synchronization introduces a delay of 1 - 2 clock cycles.
Bit
0x08 (0x28)
Read/Write
Initial Value
See “Internal Voltage Reference” on page 41.
REFERENCE
BANDGAP
Figure
ACD
R/W
ACBG
7
0
17-1.
ACBG
R/W
6
0
ACO
N/A
R
5
R/W
ACI
4
0
ACIE
R/W
3
0
ACIC
R/W
2
0
ACIS1
R/W
1
0
ACIS0
R/W
0
0
ACSR
167
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