ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 13
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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3.3.20.4
9111H–AUTO–01/11
Fail-safe Mode
The VCC regulator is switched off. NRES and RXD are low. The internal slave termination
between the LIN pin and VS pin is disabled, only a weak pull-up current (typically 10µA)
between the LIN pin and the VS pin is present. Sleep Mode can be activated independently
from the current level on the LIN, WAKE, or KL_15 pin.
A voltage less than the LIN Pre_Wake detection VLINL at the LIN pin activates the internal LIN
receiver and switches on the internal slave termination between the LIN pin and the V
A falling edge at the LIN pin followed by a dominant bus level maintained for a certain time
period (t
device switches from Sleep Mode to Fail-safe Mode.
The VCC regulator is activated, and the remote wake-up request is indicated by a low level at
the RXD pin to interrupt the microcontroller (see
EN high can be used to switch directly from Sleep/Silent to Fail-safe Mode. If EN is still high
after VCC ramp up and undervoltage reset time, the IC switches to the Normal Mode.
Figure 3-5.
The device automatically switches to Fail-safe Mode at system power-up and the voltage reg-
ulator is switched on (see
t
stays in this mode until EN is switched to high. The IC then changes to Normal Mode. A power
down of V
at NRES switches into Fail-safe Mode directly. During Fail-safe Mode the TXD pin is an output
and signals the last wake-up source.
res
= 4ms and gives a reset to the microcontroller. LIN communication is switched off. The IC
NRES
bus
VCC
TXD
Batt
LIN
EN
) and a following rising edge at pin LIN results in a remote wake-up request. The
Normal Mode
(V
Switch to Sleep Mode
S
< 4V) during Silent or Sleep Mode switches the IC into Fail-safe Mode. A low
Figure 3-7 on page
LIN switches directly to recessive mode
t
d_sleep
Delay time sleep mode
t
d
= 3.2µs
Mode select window
= maximum 20µs
Atmel ATA6612/ATA6613
Figure 3-6 on page
17). The NRES output switches to low for
Sleep Mode
14).
S
pin.
13
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