ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 184
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Serial Peripheral Interface – SPI
Atmel ATA6612/ATA6613
The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between
the Atmel
Atmel
•
•
•
•
•
•
•
•
The USART can also be used in Master SPI mode (see
The PRSPI bit in
enable SPI module.
Figure 6-65. SPI Block Diagram
Note:
Full-duplex, Three-wire Synchronous Data Transfer
Master or Slave Operation
LSB First or MSB First Data Transfer
Seven Programmable Bit Rates
End of Transmission Interrupt Flag
Write Collision Flag Protection
Wake-up from Idle Mode
Double Speed (CK/2) Master SPI Mode
®
ATA6612/ATA6613 SPI includes the following features:
1. Refer to
®
ATA6612/ATA6613 and peripheral devices or between several AVR
/2/4/8/16/32/64/128
SPI STATUS REGISTER
“Power Reduction Register - PRR” on page 66
DIVIDER
SELECT
Table 6-32 on page 97
XTAL
SPI CONTROL
SPI CLOCK (MASTER)
SPI INTERRUPT
REQUEST
(1)
MSTR
SPE
8
MSB
INTERNAL
for SPI pin placement.
DATA BUS
8
8 BIT SHIFT REGISTER
READ DATA BUFFER
8
SPI CONTROL REGISTER
CLOCK
LOGIC
“USART in SPI Mode” on page
LSB
CLOCK
S
M
M
S
S
M
must be written to zero to
MISO
MOSI
SCK
SS
9111H–AUTO–01/11
®
devices. The
220).
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