ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 45
![MCU W/LIN TXRX REG WTCHDG 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6.5.3.2
6.5.3.3
6.5.3.4
9111H–AUTO–01/11
The EEPROM Address Register – EEARH and EEARL
The EEPROM Data Register – EEDR
The EEPROM Control Register – EECR
• Bits 15..9 – Res: Reserved Bits
• Bits 8..0 – EEAR8..0: EEPROM Address
• Bits 7..0 – EEDR7.0: EEPROM Data
• Bits 7..6 – Res: Reserved Bits
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
Initial Value
Initial Value
Initial Value
Read/Write
Read/Write
Read/Write
These bits are reserved bits in the Atmel
zero.
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in
the 512 bytes EEPROM space. The EEPROM data bytes are addressed linearly between
0 and 255/511/511. The initial value of EEAR is undefined. A proper value must be written
before the EEPROM may be accessed.
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation,
the EEDR contains the data read out from the EEPROM at the address given by EEAR.
These bits are reserved bits in the Atmel ATA6612/ATA6613 and will always read as zero
The EEPROM Programming mode bit setting defines which programming action that will
be triggered when writing EEPE. It is possible to program data in one atomic operation
(erase the old value and program the new value) or to split the Erase and Write operations
in two different operations.
Bit
Bit
Bit
EEAR7
MSB
R/W
R/W
15
R
R
X
7
–
0
–
7
0
7
0
EEAR6
R/W
R/W
14
R
R
X
6
–
0
–
6
0
6
0
EEPM1
EEAR5
R/W
R/W
R/W
13
X
R
X
5
–
5
0
5
0
EEPM0
EEAR4
R/W
R/W
R/W
12
X
R
X
4
–
4
0
4
0
Atmel ATA6612/ATA6613
®
ATA6612/ATA6613 and will always read as
EEAR3
EERIE
R/W
R/W
R/W
11
3
0
R
X
–
3
0
3
0
EEMPE
EEAR2
R/W
R/W
R/W
10
R
X
2
0
–
2
0
2
0
EEAR1
EEPE
R/W
R/W
R/W
R
X
9
–
1
0
1
0
1
X
EEAR8
EEAR0
EERE
R/W
R/W
LSB
R/W
R/W
X
X
8
0
0
0
0
0
EEARH
EEARL
EEDR
EECR
45
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