ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 32
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6.2.4.4
6.2.4.5
6.2.4.6
6.2.4.7
6.2.4.8
6.2.4.9
32
Atmel ATA6612/ATA6613
Port C (PC5:0)
PC6/RESET
Port D (PD7:0)
AV
AREF
ADC7:6 (TQFP and QFN Package Only)
CC
Port C is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
PC5..0 output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
If the RSTDISBL Fuse is unprogrammed, PC6 is used as a Reset input. A low level on this pin
for longer than the minimum pulse length will generate a Reset, even if the clock is not run-
ning. The minimum pulse length is given in
guaranteed to generate a Reset.
The various special features of Port C are elaborated in
page
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit).
The Port D output buffers have symmetrical drive characteristics with both high sink and
source capability. As inputs, Port D pins that are externally pulled low will source current if the
pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
The various special features of Port D are elaborated in
page
AV
nally connected to V
to V
AREF is the analog reference pin for the A/D converter.
In the TQFP and QFN package, ADC7:6 serve as analog inputs to the A/D converter. These
pins are powered from the analog supply and serve as 10-bit ADC channels.
CC
CC
101.
104.
is the supply voltage pin for the A/D converter, PC3:0, and ADC7:6. I should be exter-
through a low-pass filter. Note that PC6..4 use digital supply voltage, V
CC
, even if the ADC is not used. If the ADC is used, it should be connected
Table 6-3 on page
“Alternate Functions of Port C” on
“Alternate Functions of Port D” on
47. Shorter pulses are not
CC
9111H–AUTO–01/11
.
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