ATTINY861-20MU Atmel, ATTINY861-20MU Datasheet - Page 4
ATTINY861-20MU
Manufacturer Part Number
ATTINY861-20MU
Description
IC MCU AVR 8K FLASH 20MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY861-20MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, SPI, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
32MLF EP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY861-20MU
Manufacturer:
LT
Quantity:
2 140
Part Number:
ATTINY861-20MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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2. Overview
2.1
4
Block Diagram
ATtiny261/461/861
ATtiny261/461/861 are low-power CMOS 8-bit microcontrollers based on the AVR enhanced
RISC architecture. By executing powerful instructions in a single clock cycle, the
ATtiny261/461/861 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
Figure 2-1.
The AVR core combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
Block Diagram
Timer/Counter0
Generation
PORT B (8)
Watchdog
Watchdog
Oscillator
Oscillator
Circuits /
EEPROM
Timer
Clock
PB[0..7]
USI
Timer/Counter1
POR / BOD &
Supervision
Analog Comp.
PORT A (8)
Power
RESET
Flash
PA[0..7]
3
CPU
debugWIRE
A/D Conv.
PROGRAM
Bandgap
SRAM
Internal
LOGIC
11
RESET
XTAL[1..2]
AVCC
AGND
AREF
2588E–AVR–08/10
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