PIC18F65J10-I/PT Microchip Technology, PIC18F65J10-I/PT Datasheet - Page 260

• Manufacturer Part Number: PIC18F65J10-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10
REGISTER 20-2:
DS39663D-page 258
bit 7-6
bit 5
bit 4
bit 3-0
ADCON1: A/D CONTROL REGISTER 1
bit 7
Unimplemented: Read as ‘0’
VCFG1: Voltage Reference Configuration bit (V
1 = V
0 = AV
VCFG0: Voltage Reference Configuration bit (V
1 = V
0 = AV
PCFG3:PCFG0: A/D Port Configuration Control bits:
A = Analog input
Note 1: AN12 through AN15 are available only in 80-pin devices.
Legend:
R = Readable bit
-n = Value at POR
PCFG3:
PCFG0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
U-0
—
REF
REF
SS
DD
- (AN2)
+ (AN3)
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
A
U-0
—
A
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
A
A
D
D
D
D
D
D
D
D
D
D
D
D
D
D
VCFG1
R/W-0
Preliminary
W = Writable bit
’1’ = Bit is set
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
VCFG0
R/W-0
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D = Digital I/O
D
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
REF
REF
PCFG3
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
A
- source)
+ source)
A
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
PCFG2
R/W-0
D
D
D
D
D
D
D
A
A
A
A
A
A
A
A
A
© 2006 Microchip Technology Inc.
D
D
D
D
D
A
A
A
A
A
A
A
A
A
A
A
x = Bit is unknown
PCFG1
A
A
A
A
A
A
A
A
A
A
A
A
D
D
D
D
R/W-0
A
A
A
A
A
A
A
A
A
A
A
A
A
D
D
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
PCFG0
R/W-0
bit 0
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
D