PIC18F6490-E/PT Microchip Technology, PIC18F6490-E/PT Datasheet - Page 241

• Manufacturer Part Number: PIC18F6490-E/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6490-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• For Use With: DM163028 - BOARD DEMO PICDEM LCD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

18.6
Figure 18-4 shows the operation of the A/D converter
after the GO/DONE bit has been set and the
ACQT2:ACQT0 bits are cleared. A conversion is
started after the following instruction to allow entry into
Sleep mode before the conversion begins.
Figure 18-5 shows the operation of the A/D converter
after
ACQT2:ACQT0 bits are set to ‘010’ and a 4 T
sition time has been selected before the conversion
starts.
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
FIGURE 18-4:
FIGURE 18-5:
© 2007 Microchip Technology Inc.
(Holding capacitor continues
acquiring input)
Set GO/DONE bit
1
the
conversion
A/D Conversions
T
T
CY
Set GO/DONE bit
ACQT
Acquisition
Holding capacitor is disconnected from analog input (typically 100 ns)
Automatic
GO/DONE
2
- T
Time
AD
Cycles
Conversion starts
T
3
AD
sample.
A/D CONVERSION T
A/D CONVERSION T
1 T
bit
4
AD
b9
2 T
(Holding capacitor is disconnected)
Conversion starts
has
1
This
AD
b8
3 T
been
b9
2
AD
means
b7
4 T
set,
AD
PIC18F6390/6490/8390/8490
On the following cycle:
ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
b8
3
AD
AD
AD
acqui-
b6
5 T
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
On the following cycle:
ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
the
the
b7
4
AD
b5
6 T
T
5
b6
AD
AD
b4
After the A/D conversion is completed or aborted, a
2 T
started. After this wait, acquisition on the selected
channel is automatically started.
18.7
The discharge phase is used to initialize the value of
the capacitor array. The array is discharged before
every sample. This feature helps to optimize the
unity-gain amplifier as the circuit always needs to
charge
charge/discharge based on previous measure values.
7 T
Cycles
Note:
b5
AD
6
AD
b3
wait is required before the next acquisition can be
8
Discharge
b4
T
7
the
AD
b2
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
9 T
b3
8
AD
capacitor
b1
10
ACQ
T
b2
9
AD
ACQ
b0
11
= 0)
= 4 T
10
T
b1
array,
AD
Discharge
1
AD
DS39629C-page 239
b0
11
)
rather
T
Discharge
AD
1
than