ATMEGA644A-AUR Atmel, ATMEGA644A-AUR Datasheet - Page 281
ATMEGA644A-AUR
Manufacturer Part Number
ATMEGA644A-AUR
Description
IC MCU AVR 64K FLASH 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644A-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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25.6
8272A–AVR–01/10
Entering the Boot Loader Program
Table 25-2.
Note:
Table 25-3.
Note:
Entering the Boot Loader takes place by a jump or call from the application program. This may
be initiated by a trigger such as a command received via USART, or SPI interface. Alternatively,
the Boot Reset Fuse can be programmed so that the Reset Vector is pointing to the Boot Flash
start address after a reset. In this case, the Boot Loader is started after a reset. After the applica-
tion code is loaded, the program can start executing the application code. Note that the fuses
cannot be changed by the MCU itself. This means that once the Boot Reset Fuse is pro-
grammed, the Reset Vector will always point to the Boot Loader Reset and the fuse can only be
changed through the serial or parallel programming interface.
Table 25-4.
Note:
164A/164PA/324A/324PA/644A/644PA/1284/1284P
BLB0 Mode
BLB1 Mode
BOOTRST
1
2
3
4
1
2
3
4
1
0
1. “1” means unprogrammed, “0” means programmed
1. “1” means unprogrammed, “0” means programmed
1. “1” means unprogrammed, “0” means programmed
Boot Lock Bit0 Protection Modes (Application Section)
Boot Lock Bit1 Protection Modes (Boot Loader Section)
Boot Reset Fuse
BLB02
BLB12
Reset Address
Reset Vector = Application Reset (address 0x0000)
Reset Vector = Boot Loader Reset (see
1
1
0
0
1
1
0
0
BLB01
BLB11
1
0
0
1
1
0
0
1
(1)
Protection
No restrictions for SPM or (E)LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
(E)LPM executing from the Boot Loader section is not allowed to
read from the Application section. If Interrupt Vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.
(E)LPM executing from the Boot Loader section is not allowed to
read from the Application section. If Interrupt Vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.
Protection
No restrictions for SPM or (E)LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and
(E)LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
(E)LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
Table 25-10 on page
(1)
(1)
290)
281
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