DSPIC33FJ12MC202-I/SS Microchip Technology, DSPIC33FJ12MC202-I/SS Datasheet - Page 107

• Manufacturer Part Number: DSPIC33FJ12MC202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 8-1:
© 2008 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 18
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-1
bit 0
I2C1MD
R/W-0
U-0
—
Unimplemented: Read as ‘0’
T3MD: Timer3 Module Disable bit
1 = Timer3 module is disabled
0 = Timer3 module is enabled
T2MD: Timer2 Module Disable bit
1 = Timer2 module is disabled
0 = Timer2 module is enabled
T1MD: Timer1 Module Disable bit
1 = Timer1 module is disabled
0 = Timer1 module is enabled
QEIMD: QEI Module Disable bit
1 = QEI module is disabled
0 = QEI module is enabled
PWM1MD: PWM1 Module Disable bit
1 = PWM1 module is disabled
0 = PWM1 module is enabled
Unimplemented: Read as ‘0’
I2C1MD: I
1 = I
0 = I
Unimplemented: Read as ‘0’
U1MD: UART1 Module Disable bit
1 = UART1 module is disabled
0 = UART1 module is enabled
Unimplemented: Read as ‘0’
SPI1MD: SPI1 Module Disable bit
1 = SPI1 module is disabled
0 = SPI1 module is enabled
Unimplemented: Read as ‘0’
AD1MD: ADC1 Module Disable bit
1 = ADC1 module is disabled
0 = ADC1 module is enabled
2
2
U-0
U-0
—
—
C1 module is disabled
C1 module is enabled
PMD1: PERIPHERAL MODULE DISABLE CONTROL REGISTER 1
2
C1 Module Disable bit
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
U1MD
T3MD
R/W-0
T2MD
U-0
—
Preliminary
dsPIC33FJ12MC201/202
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SPI1MD
R/W-0
R/W-0
T1MD
QEIMD
R/W-0
U-0
—
x = Bit is unknown
PWM1MD
R/W-0
U-0
—
DS70265C-page 105
AD1MD
R/W-0
U-0
—
bit 8
bit 0