DSPIC33FJ12MC202-I/SS Microchip Technology, DSPIC33FJ12MC202-I/SS Datasheet - Page 267

• Manufacturer Part Number: DSPIC33FJ12MC202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

APPENDIX A:
Revision A (January 2007)
Initial release of this document.
Revision B (May 2007)
This revision includes the following corrections and
updates:
• Minor typographical and formatting corrections
• New content:
• Figure update:
• Equation update:
• Register updates:
• Table updates:
• Operation value update:
© 2008 Microchip Technology Inc.
throughout the data sheet text.
- Addition of bullet item (16-word conversion
- Oscillator System Diagram (see Figure 7-1)
- WDT Block Diagram (see Figure 20-2)
- Serial Clock Rate (see Equation 17-1)
- Clock Divisor Register (see Register 7-2)
- PLL Feedback Divisor Register (see
- Peripheral Pin Select Input Registers (see
- Note 2 in PWM Control Register 1 (see
- ADC1 Input Channel 1, 2, 3 Select Register
- ADC1 Input Channel 0 Select Register (see
- AD1CON3 (see Table 3-15 and Table 3-16)
- RPINR15 (see Table 3-17)
- TRISA (see Table 3-20)
- TRISB (see Table 3-22)
- Reset Flag Bit Operation (see Table 5-1)
- Configuration Bit Values for Clock Operation
- IOLOCK set/clear operation (see
result buffer) (see Section 19.1 “Key
Features”)
Register 7-3)
Register 9-1 through Register 9-13)
Register 14-5)
(see Register 19-4)
Register 19-5)
(see Table 7-1)
Section 9.4.3.1 “Control Register Lock”)
REVISION HISTORY
Preliminary
dsPIC33FJ12MC201/202
• The following tables in Section 23.0 “Electrical
Characteristics” have been updated with prelim-
inary values:
- Updated Max MIPS for -40°C to +125°C
- Updated parameter DC18 (see Table 23-4)
- Added new parameters for +125°C, and
- Added new parameters for +125°C, and
- Added new parameters for +125°C, and
- Added new parameters for +125°C, and
- Updated parameter DI51, added parameters
- Added Note 1 (see Table 23-11)
- Updated parameter OS30 (see Table 23-16)
- Updated parameter OS52 (see Table 23-17)
- Updated parameter F20, added Note 2 (see
- Updated parameter F21 (see Table 23-19)
- Updated parameter TA15 (see Table 23-22)
- Updated parameter TB15 (see Table 23-23)
- Updated parameter TC15 (see Table 23-24)
- Updated parameter IC15 (see Table 23-26)
- Updated parameters AD05, AD06, AD07,
- Separated the ADC Module Specifications
- Updated parameter AD50 (see Table 23-41)
- Updated parameters AD50 and AD57 (see
Temp Range (see Table 23-1)
updated Typical and Max values for most
parameters (see Table 23-5)
updated Typical and Max values for most
parameters (see Table 23-6)
updated Typical and Max values for most
parameters (see Table 23-7)
updated Typical and Max values for most
parameters (see Table 23-8)
DI51a, DI51b, and DI51c (see Table 23-9)
Table 23-18)
AD08, AD10, and AD11; added parameters
AD05a and AD06a; added Note 2; modified
ADC Accuracy headings to include
measurement information (see Table 23-38)
table into three tables (see Table 23-38,
Table 23-39, and Table 23-40)
Table 23-42)
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