DSPIC33FJ12MC202-I/SS Microchip Technology, DSPIC33FJ12MC202-I/SS Datasheet - Page 33
DSPIC33FJ12MC202-I/SS
Manufacturer Part Number
DSPIC33FJ12MC202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ12MC201-ISO.pdf
(288 pages)
3.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
4.DSPIC33FJ12MC202-IML.pdf
(282 pages)
Specifications of DSPIC33FJ12MC202-I/SS
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ12MC202-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC24HJ12GP201-ISO PDF datasheet
- DSPIC33FJ12MC201-ISO PDF datasheet #2
- DSPIC33FJ12MC201-ISO PDF datasheet #3
- DSPIC33FJ12MC202-IML PDF datasheet #4
- Current page: 33 of 282
- Download datasheet (4Mb)
TABLE 3-5:
TABLE 3-6:
TABLE 3-7:
TMR1
PR1
T1CON
TMR2
TMR3HLD 0108
TMR3
PR2
PR3
T2CON
T3CON
Legend:
IC1BUF
IC1CON
IC2BUF
IC2CON
IC7BUF
IC7CON
IC8BUF
IC8CON
Legend:
OC1RS
OC1R
OC1CON
OC2RS
OC2R
OC2CON
Legend:
SFR Name
SFR Name
Name
SFR
Addr
0100
0102
0106
010A
010C
010E
SFR
0104
0110
0112
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
015A
015C
015E
SFR
0140
0142
0144
0146
0158
Addr
SFR
0180
0182
0184
0186
0188
018A
Bit 15
TON
TON
TON
TIMER REGISTER MAP
INPUT CAPTURE REGISTER MAP
OUTPUT COMPARE REGISTER MAP
Bit 15
Bit 15
—
—
—
—
—
—
Bit 14
—
—
—
Bit 14
Bit 14
—
—
—
—
—
—
Bit 13
TSIDL
TSIDL
TSIDL
OCSIDL
OCSIDL
ICSIDL
ICSIDL
ICSIDL
ICSIDL
Bit 13
Bit 13
Bit 12
—
—
—
Bit 12
Bit 12
—
—
—
—
—
—
Bit 11
Bit 11
Bit 11
—
—
—
—
—
—
—
—
—
Bit 10
Bit 10
Bit 10
—
—
—
—
—
—
—
—
—
Timer3 Holding Register (for 32-bit timer operations only)
Bit 9
Bit 9
Bit 9
—
—
—
—
—
—
—
—
—
Output Compare 1 Secondary Register
Output Compare 2 Secondary Register
Output Compare 1 Register
Output Compare 2 Register
Input 1 Capture Register
Input 2 Capture Register
Input 7 Capture Register
Input 8Capture Register
Bit 8
Bit 8
Bit 8
—
—
Period Register 1
Period Register 2
Period Register 3
Timer1 Register
Timer2 Register
Timer3 Register
—
—
—
—
—
—
—
Bit 7
ICTMR
ICTMR
ICTMR
ICTMR
Bit 7
—
—
Bit 7
—
—
—
Bit 6
TGATE
TGATE
TGATE
—
—
Bit 6
Bit 6
ICI<1:0>
ICI<1:0>
ICI<1:0>
ICI<1:0>
Bit 5
—
—
Bit 5
Bit 5
TCKPS<1:0>
TCKPS<1:0>
TCKPS<1:0>
OCFLT
OCFLT
Bit 4
ICOV
ICOV
ICOV
ICOV
Bit 4
Bit 4
OCTSEL
OCTSEL
Bit 3
ICBNE
ICBNE
ICBNE
ICBNE
Bit 3
Bit 3
T32
—
—
Bit 2
Bit 2
TSYNC
Bit 2
—
—
OCM<2:0>
OCM<2:0>
ICM<2:0>
ICM<2:0>
ICM<2:0>
ICM<2:0>
Bit 1
Bit 1
Bit 1
TCS
TCS
TCS
Bit 0
Bit 0
Bit 0
—
—
—
Resets
Resets
xxxx
0000
xxxx
0000
xxxx
0000
xxxx
0000
Resets
xxxx
xxxx
0000
xxxx
xxxx
0000
All
xxxx
FFFF
0000
xxxx
xxxx
xxxx
FFFF
FFFF
0000
0000
All
All
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