DSPIC33FJ12MC202-I/SS Microchip Technology, DSPIC33FJ12MC202-I/SS Datasheet - Page 276

• Manufacturer Part Number: DSPIC33FJ12MC202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ12MC201/202
Input Capture .................................................................... 139
Input Change Notification.................................................. 110
Instruction Addressing Modes............................................. 40
Instruction Set
Instruction-Based Power-Saving Modes ........................... 103
Internal RC Oscillator
Internet Address................................................................ 277
Interrupt Control and Status Registers................................ 67
Interrupt Setup Procedures ................................................. 93
Interrupt Vector Table (IVT) ................................................ 63
Interrupts Coincident with Power Save Instructions.......... 104
J
JTAG Boundary Scan Interface ........................................ 197
JTAG Interface .................................................................. 203
M
Memory Organization.......................................................... 23
Microchip Internet Web Site .............................................. 277
Modulo Addressing ............................................................. 42
Motor Control PWM........................................................... 145
Motor Control PWM Module
MPLAB ASM30 Assembler, Linker, Librarian ................... 214
MPLAB ICD 2 In-Circuit Debugger.................................... 215
MPLAB ICE 2000 High-Performance Universal
MPLAB Integrated Development
MPLAB PM3 Device Programmer..................................... 215
MPLAB REAL ICE In-Circuit Emulator System................. 215
MPLINK Object Linker/MPLIB Object Librarian ................ 214
N
NVM Module
DS70265C-page 274
Registers ................................................................... 140
File Register Instructions ............................................ 40
Fundamental Modes Supported.................................. 41
MAC Instructions......................................................... 41
MCU Instructions ........................................................ 40
Move and Accumulator Instructions ............................ 41
Other Instructions........................................................ 41
Overview ................................................................... 208
Summary................................................................... 205
Idle ............................................................................ 104
Sleep ......................................................................... 103
Use with WDT ........................................................... 202
IECx ............................................................................ 67
IFSx............................................................................. 67
INTCON1 .................................................................... 67
INTCON2 .................................................................... 67
IPCx ............................................................................ 67
Initialization ................................................................. 93
Interrupt Disable.......................................................... 93
Interrupt Service Routine ............................................ 93
Trap Service Routine .................................................. 93
Applicability ................................................................. 43
Operation Example ..................................................... 42
Start and End Address ................................................ 42
W Address Register Selection .................................... 42
2-Output Register Map................................................ 33
4-Output Register Map................................................ 32
6-Output Register Map................................................ 32
In-Circuit Emulator .................................................... 215
Environment Software............................................... 213
Register Map............................................................... 39
Preliminary
O
Open-Drain Configuration................................................. 110
Output Compare ............................................................... 141
P
Packaging ......................................................................... 255
Peripheral Module Disable (PMD) .................................... 104
PICSTART Plus Development Programmer..................... 216
Pinout I/O Descriptions (table).............................................. 9
PMD Module
PORTA
PORTB
Power-on Reset (POR)....................................................... 60
Power-Saving Features .................................................... 103
Program Address Space..................................................... 23
Program Memory
PWM Time Base............................................................... 148
Q
Quadrature Encoder Interface (QEI)................................. 159
Quadrature Encoder Interface (QEI) Module
R
Reader Response............................................................. 278
Registers
Details....................................................................... 257
Marking ............................................................. 255, 256
Register Map .............................................................. 39
Register Map .............................................................. 38
Register Map for dsPIC33FJ12MC201....................... 38
Register Map for dsPIC33FJ12MC202....................... 38
Clock Frequency and Switching ............................... 103
Construction ............................................................... 45
Data Access from Program Memory
Data Access from Program Memory Using
Data Access from, Address Generation ..................... 46
Memory Map............................................................... 23
Table Read Instructions
Visibility Operation ...................................................... 48
Interrupt Vector ........................................................... 24
Organization ............................................................... 24
Reset Vector ............................................................... 24
Register Map .............................................................. 33
AD1CHS123 (ADC1 Input Channel
ADxCHS0 (ADCx Input Channel 0 Select ................ 193
ADxCON1 (ADCx Control 1)..................................... 187
ADxCON2 (ADCx Control 2)..................................... 189
ADxCON3 (ADCx Control 3)..................................... 190
ADxCSSL (ADCx Input Scan Select Low) ................ 194
ADxPCFGL (ADCx Port Configuration Low)............. 195
CLKDIV (Clock Divisor) .............................................. 99
CORCON (Core Control) ...................................... 16, 68
DFLTxCON (QEI Control)......................................... 162
I2CxCON (I2Cx Control) ........................................... 171
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 175
I2CxSTAT (I2Cx Status) ........................................... 173
IEC0 (Interrupt Enable Control 0) ............................... 77
IEC1 (Interrupt Enable Control 1) ............................... 79
IEC3 (Interrupt Enable Control 3) ............................... 80
IEC4 (Interrupt Enable Control 4) ............................... 81
Using Program Space Visibility .......................... 48
Table Instructions ............................................... 47
TBLRDH ............................................................. 47
TBLRDL.............................................................. 47
1, 2, 3 Select) ................................................... 191
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