PIC18F65K90-I/PTRSL Microchip Technology, PIC18F65K90-I/PTRSL Datasheet - Page 276
![MCU PIC 32K FLASH MEM XLP 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65K90-I/PTRSL
Manufacturer Part Number
PIC18F65K90-I/PTRSL
Description
MCU PIC 32K FLASH MEM XLP 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F65K90-I/PTRSL
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
2048Byte
Cpu Speed
16MIPS
No. Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65K90-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87K90 FAMILY
The
functions of the port pins. Setting the segment enable
bit for a particular segment configures that pin as an
LCD driver. There are six LCD Segment Enable
registers, as shown in Table 20-1. The prototype
LCDSEx register is shown in Register 20-5.
TABLE 20-1:
REGISTER 20-5:
DS39957B-page 276
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
SE(n + 7)
R/W-0
LCDSE5:LCDSE0
Register
LCDSE0
LCDSE1
LCDSE2
LCDSE3
LCDSE4
LCDSE5
SE(n + 7):SE(n): Segment Enable bits
For LCDSE0: n = 0
For LCDSE1: n = 8
For LCDSE2: n = 16
For LCDSE3: n = 24
For LCDSE4: n = 32
For LCDSE5: n = 40
1 = Segment function of the pin is enabled, digital I/O is disabled
0 = I/O function of the pin is enabled
SE(n + 6)
LCDSE REGISTERS AND
ASSOCIATED SEGMENTS
R/W-0
LCDSEx: LCD SEGMENTx ENABLE REGISTER
registers
RC<7:6>, RG4, RF<7:6>)
31:24 (RE7, RB0, RB5,
23:16 (RF<5:1>, RA1,
W = Writable bit
‘1’ = Bit is set
15:8 (RA<5:4>, RC2,
SE(n + 5)
47:40 (RH<0:3>,
39:32 (RJ<4:7>,
RC5, RB<4:1>)
RJ<3:1>, RC1)
R/W-0
7:0 (RD<7:0>)
Segments
RC<4:3>)
RH<7:4>)
configure
SE(n + 4)
R/W-0
Preliminary
the
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SE(n + 3)
R/W-0
Once the module is initialized for the LCD panel, the
individual bits of the LCDDATA23:LCDDATA0 registers
are cleared or set to represent a clear or dark pixel,
respectively.
Specific sets of LCDDATA registers are used with
specific segments and common signals. Each bit
represents a unique combination of a specific segment
connected to a specific common.
Individual LCDDATA bits are named by the convention,
“SxxCy”, with “xx” as the segment number and “y” as
the common number. The relationship is summarized
in Table 20-2. The prototype LCDDATAx register is
shown in Register 20-6.
Note:
Note:
The LCDSE5:LCDSE4 registers are not
implemented in PIC18F6XK90 devices.
In PIC18F6XK90 devices, writing into the
registers,
LCDDATA10, LCDDATA11, LCDDATA16,
LCDDATA17,
LCDDATA23, will not affect the status of
any pixel. These registers can be used as
general purpose registers.
SE(n + 2)
R/W-0
2010 Microchip Technology Inc.
LCDDATA4,
x = Bit is unknown
SE(n + 1)
R/W-0
LCDDATA22
LCDDATA5,
R/W-0
SE(n)
bit 0
and
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