PIC18F65K90-I/PTRSL Microchip Technology, PIC18F65K90-I/PTRSL Datasheet - Page 315
![MCU PIC 32K FLASH MEM XLP 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65K90-I/PTRSL
Manufacturer Part Number
PIC18F65K90-I/PTRSL
Description
MCU PIC 32K FLASH MEM XLP 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F65K90-I/PTRSL
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
2048Byte
Cpu Speed
16MIPS
No. Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65K90-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
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REGISTER 21-6:
REGISTER 21-7:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
R/W-0
GCEN
R/W-1
MSK7
2:
If the I
writes to the SSPxBUF are disabled).
This register shares the same SFR address as SSPxADD and is only addressable in select MSSPx
operating modes. See Section 21.4.3.4 “7-Bit Address Masking Mode” for more details.
MSK0 is not used as a mask bit in 7-bit addressing.
GCEN: General Call Enable bit
1 = Enables interrupt when a general call address (0000h) is received in the SSPxSR
0 = General call address is disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK<5:2>: Slave Address Mask Select bits (5-Bit Address Masking mode)
1 = Masking of corresponding bits of SSPxADD is enabled
0 = Masking of corresponding bits of SSPxADD is disabled
ADMSK1: Slave Address Least Significant bit(s) Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SSPxADD<1> only is enabled
0 = Masking of SSPxADD<1> only is disabled
In 10-Bit Addressing mode:
1 = Masking of SSPxADD<1:0> is enabled
0 = Masking of SSPxADD<1:0> is disabled
SEN: Stretch Enable bit
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
MSK<7:0>: Slave Address Mask Select bit
1 = Masking of the corresponding bit of SSPxADD is enabled
0 = Masking of the corresponding bit of SSPxADD is disabled
ACKSTAT
2
R/W-0
C module is active, this bit may not be set (no spooling) and the SSPxBUF may not be written (or
R/W-1
MSK6
SSPxCON2: MSSPx CONTROL REGISTER 2 (I
SSPxMSK: I
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
ADMSK5
R/W-0
R/W-1
MSK5
2
C™ SLAVE ADDRESS MASK REGISTER (7-BIT MASKING MODE)
(1)
ADMSK4
R/W-0
R/W-1
MSK4
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K90 FAMILY
ADMSK3
R/W-0
R/W-1
MSK3
ADMSK2
2
R/W-0
R/W-1
MSK2
C™ SLAVE MODE)
x = Bit is unknown
x = Bit is unknown
ADMSK1
R/W-0
R/W-1
MSK1
DS39957B-page 315
MSK0
SEN
R/W-0
R/W-1
(1)
(2)
bit 0
bit 0
(1)
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