PIC18F65K90-I/PTRSL Microchip Technology, PIC18F65K90-I/PTRSL Datasheet - Page 37
![MCU PIC 32K FLASH MEM XLP 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65K90-I/PTRSL
Manufacturer Part Number
PIC18F65K90-I/PTRSL
Description
MCU PIC 32K FLASH MEM XLP 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F65K90-I/PTRSL
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
2048Byte
Cpu Speed
16MIPS
No. Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65K90-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
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2.4
The on-chip voltage regulator enable pin, ENVREG,
must always be connected directly to either a supply
voltage or to ground. Tying ENVREG to V
the regulator, while tying it to ground disables the
regulator. Refer to Section 28.3 “On-Chip Voltage
Regulator” for details on connecting and using the
on-chip regulator.
When the regulator is enabled, a low-ESR (< 5Ω)
capacitor is required on the V
stabilize the voltage regulator output voltage. The
V
must use a capacitor of 10 F connected to ground. The
type can be ceramic or tantalum. A suitable example is
the Murata GRM21BF50J106ZE01 (10 F, 6.3V) or
equivalent. Designers may use Figure 2-3 to evaluate
ESR equivalence of candidate devices.
It is recommended that the trace length not exceed
0.25 inch (6 mm). Refer to Section 31.0 “Electrical
Characteristics” for additional information.
When the regulator is disabled, a 0.1 F capacitor
should be connected from the V
ground. This capacitor’s characteristics must be similar
to those of the “decoupling” capacitors explained in
Section 2.2.1 “Decoupling Capacitors”. For details
on the V
disabled, see parameter D001 in Section 31.0
“Electrical Characteristics”.
Some PIC18FXXKXX families or some devices within
a family do not provide the option of enabling or
disabling the on-chip voltage regulator:
• Some devices (with the name, PIC18LFXXKXX)
• Some devices permanently enable the voltage
For details on all members of the PIC18F87K90 family,
see Section 28.3 “On-Chip Voltage Regulator”.
2010 Microchip Technology Inc.
CAP
permanently disable the voltage regulator.
These devices’ do not have the ENVREG pin and
require a 0.1 F capacitor on the V
pin. The V
with the “voltage regulator disabled” specification
for parameter D001, in Section 31.0 “Electrical
Characteristics”.
regulator.
These devices also do not have the ENVREG pin.
The 10F capacitor is still required on the
V
CAP
/V
DDCORE
/V
Voltage Regulator Pins (ENVREG
and V
DDCORE
DD
DD
requirement, when the regulator is
pin must not be connected to V
level of these devices must comply
CAP
pin.
/V
DDCORE
CAP
)
CAP
/V
/V
CAP
DDCORE
DDCORE
/V
DD
DDCORE
enables
DD
pin to
pin to
and
Preliminary
PIC18F87K90 FAMILY
FIGURE 2-3:
2.5
The PGC and PGD pins are used for In-Circuit Serial
Programming™ (ICSP™) and debugging purposes. It
is recommended to keep the trace length between the
ICSP connector and the ICSP pins on the device as
short as possible. If the ICSP connector is expected to
experience an ESD event, a series resistor is recom-
mended, with the value in the range of a few tens of
ohms, not to exceed 100Ω.
Pull-up resistors, series diodes and capacitors on the
PGC and PGD pins are not recommended as they will
interfere with the programmer/debugger communica-
tions to the device. If such discrete components are an
application requirement, they should be removed from
the circuit during programming and debugging. Alter-
natively, refer to the AC/DC characteristics and timing
requirements information in the respective device
Flash programming specification for information on
capacitive loading limits, and pin input voltage high
(V
For device emulation, ensure that the “Communication
Channel Select” (i.e., PGCx/PGDx pins) programmed
into the device matches the physical connections for
the ICSP to the Microchip debugger/emulator tool.
For
development tools connection requirements, refer to
Section 30.0 “Development Support”.
IH
0.001
Note:
0.01
) and input low (V
0.1
10
more
1
0.01
ICSP Pins
Data for Murata GRM21BF50J106ZE01 shown.
Measurements at 25°C, 0V DC bias.
information
0.1
Frequency (MHz)
IL
FREQUENCY vs. ESR
PERFORMANCE FOR
SUGGESTED V
1
) requirements.
on
10
available
100
DS39957B-page 37
CAP
1000 10,000
Microchip
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