PIC18F2580-E/SP Microchip Technology, PIC18F2580-E/SP Datasheet - Page 278

• Manufacturer Part Number: PIC18F2580-E/SP
• Description: IC PIC MCU FLASH 16KX16 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2580-E/SP

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: SPI/I2C/MSSP/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2480/2580/4480/4580
REGISTER 23-1:
DS39637C-page 276
Mode 0
Mode 1
Mode 2
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3-1
bit 0
bit 4-0
bit 7
REQOP2:REQOP0: Request CAN Operation Mode bits
1xx = Request Configuration mode
011 = Request Listen Only mode
010 = Request Loopback mode
001 = Request Disable mode
000 = Request Normal mode
ABAT: Abort All Pending Transmissions bit
1 = Abort all pending transmissions (in all transmit buffers)
0 = Transmissions proceeding as normal
Mode 0:
WIN2:WIN0: Window Address bits
These bits select which of the CAN buffers to switch into the access bank area. This allows access to the
buffer registers from any data memory bank. After a frame has caused an interrupt, the ICODE3:ICODE0
bits can be copied to the WIN3:WIN0 bits to select the correct buffer. See Example 23-2 for a code
example.
111 = Receive Buffer 0
110 = Receive Buffer 0
101 = Receive Buffer 1
100 = Transmit Buffer 0
011 = Transmit Buffer 1
010 = Transmit Buffer 2
001 = Receive Buffer 0
000 = Receive Buffer 0
Unimplemented: Read as ‘0’
Mode 1:
Unimplemented: Read as ‘0’
Mode 2:
FP3:FP0: FIFO Read Pointer bits
These bits point to the message buffer to be read.
0111:0000 = Message buffer to be read
1111:1000 = Reserved
REQOP2
REQOP2
REQOP2
R/W-1
R/W-1
R/W-1
CANCON: CAN CONTROL REGISTER
REQOP1
REQOP1
REQOP1
R/W-0
R/W-0
R/W-0
S = Settable bit
W = Writable bit
‘1’ = Bit is set
REQOP0
REQOP0
REQOP0
R/W-0
R/W-0
R/W-0
Preliminary
R/S-0
ABAT
R/S-0
ABAT
R/S-0
ABAT
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
WIN2
FP3
R-0
U0
—
R/W-0
WIN1
FP2
U-0
R-0
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
R/W-0
WIN0
FP1
U-0
R-0
—
FP0
U-0
U-0
R-0
—
—
bit 0