PIC18F8390-I/PT Microchip Technology, PIC18F8390-I/PT Datasheet - Page 128
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PIC18F8390-I/PT
Manufacturer Part Number
PIC18F8390-I/PT
Description
IC PIC MCU FLASH 4KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6310-IPT.pdf
(28 pages)
3.PIC18F6390-IPT.pdf
(414 pages)
4.PIC18F6390-IPT.pdf
(16 pages)
5.PIC18F6390-IPT.pdf
(12 pages)
6.PIC18F6390-IPT.pdf
(6 pages)
7.PIC18F6390-IPT.pdf
(4 pages)
8.PIC18F8490-IPT.pdf
(412 pages)
Specifications of PIC18F8390-I/PT
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8390-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8390-I/PT
Manufacturer:
MICRO
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F6310-IPT PDF datasheet #2
- PIC18F6390-IPT PDF datasheet #3
- PIC18F6390-IPT PDF datasheet #4
- PIC18F6390-IPT PDF datasheet #5
- PIC18F6390-IPT PDF datasheet #6
- PIC18F6390-IPT PDF datasheet #7
- PIC18F8490-IPT PDF datasheet #8
- Current page: 128 of 412
- Download datasheet (8Mb)
PIC18F6390/6490/8390/8490
TABLE 9-14:
TABLE 9-15:
DS39629B-page 126
RG0/SEG30
RG1/TX2/CK2/
SEG29
RG2/RX2/DT2/
SEG28
RG3/SEG27
RG4/SEG26
MCLR/V
Legend:
Note 1:
PORTG
LATG
TRISG
LCDSE3
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTG.
Note 1:
Pin Name
Name
PP
/RG5
PWR = Power Supply, O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
RG5 does not have a corresponding TRISG bit.
RG5 is available as an input only when MCLR is disabled.
SE31
Bit 7
Function
—
—
—
PORTG FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTG
SEG30
SEG29
SEG28
SEG27
SEG26
MCLR
RG0
RG1
CK2
RG2
RX2
RG3
RG4
RG5
TX2
DT2
V
PP
SE30
Bit 6
—
—
—
Setting
TRIS
—
—
—
0
1
x
0
1
1
1
1
x
0
1
1
1
1
x
0
1
0
0
1
x
(1)
(1)
(1)
RG5
SE29
Bit 5
I/O
—
—
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
(1)
Buffer
ANA
ANA
ANA
ANA
ANA
ANA
Read PORTG pin/Write PORTG Data Latch
LATG Data Output Register
Data Direction Control Register for PORTG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
SE28
Bit 4
Preliminary
LATG<0> data output; disabled when LCD segment enabled.
PORTG<0> data input.
Segment 30 analog output for LCD.
LATG<1> data output; disabled when LCD segment enabled.
PORTG<1> data input.
Synchronous serial data output (AUSART module); takes priority over
port data.
Synchronous serial data input (AUSART module). User must configure
as an input.
Synchronous serial clock input (AUSART module).
Segment 29 analog output for LCD.
LATG<2> data output; disabled when LCD segment enabled.
PORTG<2> data input.
Asynchronous serial receive data input (AUSART module).
Synchronous serial data output (AUSART module); takes priority over
port data.
Synchronous serial data input (AUSART module). User must configure
as an input.
Segment 28 analog output for LCD.
LATG<3> data output; disabled when LCD segment enabled.
PORTG<3> data input.
Segment 27 analog output for LCD.
LATG<4> data output; disabled when LCD segment enabled.
PORTG<4> data input.
Segment 26 analog output for LCD.
External Master Clear input; enabled when MCLRE configuration bit is set.
High-voltage detection; used for ICSP™ mode entry detection. Always
available, regardless of pin mode.
PORTG<5> data input; enabled when MCLRE configuration bit is clear.
SE27
Bit 3
SE26
Bit 2
Description
SE25
Bit 1
2004 Microchip Technology Inc.
SE24
Bit 0
Reset Values
on Page
62
62
62
64
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