PIC18F8390-I/PT Microchip Technology, PIC18F8390-I/PT Datasheet - Page 400
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PIC18F8390-I/PT
Manufacturer Part Number
PIC18F8390-I/PT
Description
IC PIC MCU FLASH 4KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6310-IPT.pdf
(28 pages)
3.PIC18F6390-IPT.pdf
(414 pages)
4.PIC18F6390-IPT.pdf
(16 pages)
5.PIC18F6390-IPT.pdf
(12 pages)
6.PIC18F6390-IPT.pdf
(6 pages)
7.PIC18F6390-IPT.pdf
(4 pages)
8.PIC18F8490-IPT.pdf
(412 pages)
Specifications of PIC18F8390-I/PT
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8390-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8390-I/PT
Manufacturer:
MICRO
Quantity:
20 000
PIC18F6390/6490/8390/8490
BN .................................................................................... 304
BNC .................................................................................. 305
BNN .................................................................................. 305
BNOV ............................................................................... 306
BNZ .................................................................................. 306
BOR. See Brown-out Reset.
BOV .................................................................................. 309
BRA .................................................................................. 307
Break Character (12-Bit) Transmit and Receive .............. 211
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ............................................. 54, 281
BSF .................................................................................. 307
BSR .................................................................................... 86
BTFSC ............................................................................. 308
BTFSS .............................................................................. 308
BTG .................................................................................. 309
BZ ..................................................................................... 310
C
C Compilers
CALL ................................................................................ 310
CALLW ............................................................................. 339
Capture (CCP Module) ..................................................... 150
Capture/Compare/PWM (CCP) ........................................ 147
Clock Sources .................................................................... 36
CLRF ................................................................................ 311
CLRWDT .......................................................................... 311
Code Examples
DS39629B-page 398
Timer1 (16-Bit Read/Write Mode) ............................ 136
Timer2 ...................................................................... 142
Timer3 ...................................................................... 144
Timer3 (16-Bit Read/Write Mode) ............................ 144
Voltage Reference Output Buffer Example .............. 249
Watchdog Timer ....................................................... 287
Disabling in Sleep Mode ............................................ 54
MPLAB C17 ............................................................. 346
MPLAB C18 ............................................................. 346
MPLAB C30 ............................................................. 346
Associated Registers ............................................... 152
CCP Pin Configuration ............................................. 150
CCPR2H:CCPR2L Registers ................................... 150
Software Interrupt .................................................... 150
Timer1/Timer3 Mode Selection ................................ 150
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 148
CCPRxH Register .................................................... 148
CCPRxL Register ..................................................... 148
Compare Mode. See Compare.
Interaction of CCP1 and CCP2 for
Interconnect Configurations ..................................... 148
Module Configuration ............................................... 148
Selecting the 31 kHz Source ...................................... 37
Selection Using OSCCON Register ........................... 37
16 x 16 Signed Multiply Routine ................................ 92
16 x 16 Unsigned Multiply Routine ............................ 92
8 x 8 Signed Multiply Routine .................................... 91
8 x 8 Unsigned Multiply Routine ................................ 91
Changing Between Capture Prescalers ................... 150
Computed GOTO Using an Offset Value ................... 68
Fast Register Stack .................................................... 68
How to Clear RAM (Bank 1) Using
Implementing a Real-Time Clock Using
Timer Resources .............................................. 149
Indirect Addressing ............................................ 81
a Timer1 Interrupt Service ............................... 139
Preliminary
Code Protection ............................................................... 281
COMF .............................................................................. 312
Comparator ...................................................................... 241
Comparator Specifications ............................................... 366
Comparator Voltage Reference ....................................... 247
Compare (CCP Module) .................................................. 151
Computed GOTO ............................................................... 68
Configuration Bits ............................................................ 281
Configuration Register Protection .................................... 292
Context Saving During Interrupts ..................................... 108
Conversion Considerations .............................................. 394
CPFSEQ .......................................................................... 312
CPFSGT .......................................................................... 313
CPFSLT ........................................................................... 313
Crystal Oscillator/Ceramic Resonator ................................ 31
D
Data Addressing Modes .................................................... 81
Initializing PORTA .................................................... 109
Initializing PORTB .................................................... 112
Initializing PORTC ................................................... 115
Initializing PORTD ................................................... 118
Initializing PORTE .................................................... 120
Initializing PORTF .................................................... 122
Initializing PORTG ................................................... 125
Initializing PORTH ................................................... 127
Initializing PORTJ .................................................... 129
Loading the SSPBUF (SSPSR) Register ................. 160
Reading a Flash Program Memory Word .................. 89
Saving Status, WREG and
Analog Input Connection Considerations ................ 245
Associated Registers ............................................... 245
Configuration ........................................................... 242
Effects of a Reset .................................................... 244
Interrupts ................................................................. 244
Operation ................................................................. 243
Operation During Sleep ........................................... 244
Outputs .................................................................... 243
Reference ................................................................ 243
Response Time ........................................................ 243
Accuracy and Error .................................................. 248
Associated Registers ............................................... 249
Configuring .............................................................. 247
Connection Considerations ...................................... 248
Effects of a Reset .................................................... 248
Operation During Sleep ........................................... 248
Associated Registers ............................................... 152
CCP Pin Configuration ............................................. 151
CCPR2 Register ...................................................... 151
Software Interrupt .................................................... 151
Special Event Trigger .............................. 145, 151, 240
Timer1/Timer3 Mode Selection ................................ 151
Comparing Addressing Modes with the
Direct ......................................................................... 81
Indexed Literal Offset ................................................ 84
Indirect ....................................................................... 81
Inherent and Literal .................................................... 81
BSR Registers in RAM .................................... 108
External Signal ................................................ 243
Internal Signal .................................................. 243
Extended Instruction Set Enabled ..................... 85
2004 Microchip Technology Inc.