PIC18F8390-I/PT Microchip Technology, PIC18F8390-I/PT Datasheet - Page 241
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PIC18F8390-I/PT
Manufacturer Part Number
PIC18F8390-I/PT
Description
IC PIC MCU FLASH 4KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6310-IPT.pdf
(28 pages)
3.PIC18F6390-IPT.pdf
(414 pages)
4.PIC18F6390-IPT.pdf
(16 pages)
5.PIC18F6390-IPT.pdf
(12 pages)
6.PIC18F6390-IPT.pdf
(6 pages)
7.PIC18F6390-IPT.pdf
(4 pages)
8.PIC18F8490-IPT.pdf
(412 pages)
Specifications of PIC18F8390-I/PT
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8390-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8390-I/PT
Manufacturer:
MICRO
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F6310-IPT PDF datasheet #2
- PIC18F6390-IPT PDF datasheet #3
- PIC18F6390-IPT PDF datasheet #4
- PIC18F6390-IPT PDF datasheet #5
- PIC18F6390-IPT PDF datasheet #6
- PIC18F6390-IPT PDF datasheet #7
- PIC18F8490-IPT PDF datasheet #8
- Current page: 241 of 412
- Download datasheet (8Mb)
18.6
Figure 18-4 shows the operation of the A/D converter
after the GO bit has been set and the ACQT2:ACQT0
bits are cleared. A conversion is started after the follow-
ing instruction to allow entry into Sleep mode before the
conversion begins.
Figure 18-5 shows the operation of the A/D converter
after the GO bit has been set and the ACQT2:ACQT0
bits are set to ‘010’ and selecting a 4 T
time before the conversion starts.
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
FIGURE 18-4:
FIGURE 18-5:
2004 Microchip Technology Inc.
(Holding capacitor continues
acquiring input)
Set GO bit
1
conversion
A/D Conversions
T
T
Set GO bit
CY
ACQT
Acquisition
Holding capacitor is disconnected from analog input (typically 100 ns)
Automatic
2
- T
Time
AD
Cycles
Conversion starts
T
3
AD
sample.
A/D CONVERSION T
A/D CONVERSION T
1 T
4
AD
b9
2 T
Conversion starts
(Holding capacitor is disconnected)
1
This
AD
b8
3 T
b9
2
AD
AD
means
b7
4 T
acquisition
PIC18F6390/6490/8390/8490
On the following cycle:
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
b8
3
AD
AD
AD
b6
5 T
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
On the following cycle:
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
Preliminary
the
4
b7
AD
b5
6 T
T
5
b6
AD
AD
b4
After the A/D conversion is completed or aborted, a
2 T
started. After this wait, acquisition on the selected
channel is automatically started.
18.7
The discharge phase is used to initialize the value of
the capacitor array. The array is discharged before
every sample. This feature helps to optimize the
unity-gain amplifier as the circuit always needs to
charge
charge/discharge based on previous measure values.
7 T
Cycles
Note:
b5
AD
6
AD
b3
wait is required before the next acquisition can be
8
Discharge
b4
T
7
the
AD
b2
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
9 T
b3
8
AD
capacitor
b1
10
ACQ
T
b2
9
AD
ACQ
b0
11
= 0)
= 4 T
10
T
b1
array,
AD
Discharge
1
AD
DS39629B-page 239
b0
11
)
rather
T
Discharge
AD
1
than
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