AT90CAN32-16AU Atmel, AT90CAN32-16AU Datasheet - Page 37

IC MCU AVR 32K FLASH 64-TQFP

AT90CAN32-16AU

Manufacturer Part Number
AT90CAN32-16AU
Description
IC MCU AVR 32K FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN32-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
AT90CANx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
No. Of I/o's
53
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
4
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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5. System Clock
5.1
5.1.1
5.1.2
5.1.3
7679H–CAN–08/08
Clock Systems and their Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
I/O
Figure 5-1
need not be active at a given time. In order to reduce power consumption, the clocks to unused
modules can be halted by using different sleep modes, as described in
Sleep Modes” on page
Figure 5-1.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, CAN,
USART. The I/O clock is also used by the External Interrupt module, but note that some external
interrupts are detected by asynchronous logic, allowing such interrupts to be detected even if the
I/O clock is halted. Also note that address recognition in the TWI module is carried out asynchro-
nously when clk
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
CPU
FLASH
CLKO
presents the principal clock systems in the AVR and their distribution. All of the clocks
Timer/Counter2
External Clock
Timer/Counter2
Asynchronous
Clock Distribution
I/O
CKOUT Fuse
is halted, enabling TWI address reception in all sleep modes.
Multiplexer
46. The clock systems are detailed below.
TOSC1
Timer/Counter2
Controller
Oscillator
CAN
TOSC2
General I/O
Modules
clk
External Clock
clk
ASY
I/O
Multiplexer
Prescaler
Control Unit
AVR Clock
Clock
ADC
clk
XTAL1
ADC
Oscillator
Crystal
AT90CAN32/64/128
Source clock
XTAL2
CPU Core
clk
clk
Reset Logic
CPU
FLASH
Watchdog clock
“Power Management and
Crystal Oscillator
Low-frequency
Watchdog Timer
RAM
Watchdog
Oscillator
Calibrated RC
Flash and
EEPROM
Oscillator
37

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