PIC14000-20/SS Microchip Technology, PIC14000-20/SS Datasheet - Page 14

• Manufacturer Part Number: PIC14000-20/SS
• Description: IC MCU OTP 4KX14 A/D 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 14r

Specifications of PIC14000-20/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 20
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: Slope A/D
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Processor Series: PIC14000
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 1
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 14 bit
• For Use With: 309-1025 - ADAPTER 28-SSOP TO 28-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC14000
TABLE 4-2:
4.2
The data memory (Figure 4-2) is partitioned into two
banks which contain the general purpose registers and
the special function registers. Bank 0 is selected when
the RP0 bit in the STATUS register is cleared. Bank 1
is selected when the RP0 bit in the STATUS register is
set. Each bank extends up to 7Fh (128 bytes). The first
32 locations of each bank are reserved for the Special
Function
Registers are mapped in both Bank 0 and Bank 1. The
general purpose registers, implemented as static RAM,
are located from address 20h through 7Fh, and A0
through FF.
DS40122B-page 14
Address
0FC0h
0FC1h
0FC2h
0FC3h
0FC4h
0FC5h
0FC6h
0FC7h
0FC8h
0FC9h
0FCAh
0FCBh
0FCCh
0FCDh
0FCEh
0FCFh
0FD0h
0FD1h
0FD2h
0FD3h -
0FF8h
0FF9h-Fh
Data Memory Organization
Registers.
K
K
K
K
K
K
K
K
V
V
V
V
K
K
K
K
F
reserved
T
reserved
calibration space checksums
CALIBRATION CONSTANT
ADDRESSES
Data
OSC
WDT
REF
REF
REF
REF
BG
BG
BG
BG
THERM
THERM
THERM
THERM
TC
TC
TC
TC
, exponent
, mantissa high byte
, mantissa middle byte
, mantissa low byte
, exponent
, mantissa high byte
, mantissa middle byte
, mantissa low byte
, unsigned byte
, unsigned byte
, exponent
, mantissa high byte
, mantissa middle byte
, mantissa low byte
Several
, exponent
, mantissa high byte
, mantissa middle byte
, mantissa low byte
Special
Function
Preliminary
4.2.1
The register file is accessed either directly, or indirectly
through the file select register FSR (Section 4.4).
FIGURE 4-2:
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
20h
7F
* Not a physical register.
Shaded areas are unimplemented memory locations,
read as ‘0’s.
GENERAL PURPOSE REGISTER FILE
Indirect add.(*)
RESERVED
(96 Bytes)
ADTMRH
ADTMRL
ADCAPH
ADCON0
ADCAPL
PCLATH
INTCON
STATUS
Purpose
Register
I
General
PORTC
PORTD
I
PORTA
2
2
TMR0
PIR1
CCON
PCL
FSR
CBUF
REGISTER FILE MAP
File Address
1996 Microchip Technology Inc.
Indirect addr.(*)
RESERVED
(96 Bytes)
SLPCON
ADCON1
OPTION
PCLATH
INTCON
I
STATUS
CMCON
Purpose
Register
I
General
2
PREFA
PREFB
TRISC
TRISD
2
TRISA
PCON
MISC
CSTAT
PIE1
CADD
PCL
FSR
8Ch
8Dh
9Ch
9Dh
81h
82h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Eh
9Fh
A0h
80h
83h
FF