PIC18C858-E/PT Microchip Technology, PIC18C858-E/PT Datasheet - Page 130
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18C858-E/PT
Manufacturer Part Number
PIC18C858-E/PT
Description
IC MCU OTP 16KX16 CAN 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C858-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
3-Wire, I2C, SPI, USART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
68
Number Of Timers
4 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163007, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
6
Data Rom Size
4 KB
Height
1 mm
Length
12 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
12 mm
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C858E/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C858-E/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18C858-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 130 of 366
- Download datasheet (7Mb)
PIC18CXX8
14.4
In Compare mode, the 16-bit CCPR1 (CCPR2) register
value is constantly compared against either the TMR1
register pair value, or the TMR3 register pair value.
When a match occurs, the RC2/CCP1 (RC1/CCP2) pin
can have one of the following actions:
• Driven high
• Driven low
• Toggle output (high to low or low to high)
• Remains unchanged
The action on the pin is based on the value of control
bits CCP1M3:CCP1M0 (CCP2M3:CCP2M0). At the
same time, interrupt flag bit CCP1IF (CCP2IF) is set.
14.4.1
The user must configure the CCPx pin as an output by
clearing the appropriate TRISC bit.
FIGURE 14-2: COMPARE MODE OPERATION BLOCK DIAGRAM
DS30475A-page 130
Note:
Special Event Trigger will:
Compare Mode
CCP PIN CONFIGURATION
RC2/CCP1
Pin
RC1/CCP2
Pin
Note:
Clearing the CCP1CON register will force
the RC2/CCP1 compare output latch to the
default low level. This is not the data latch.
Reset Timer1 or Timer3 (but not set Timer1 or Timer3 Interrupt Flag bit)
Set bit GO/DONE, which starts an A/D conversion (CCP2 only)
Output Enable
Output Enable
TRISC<2>
TRISC<1>
I/O pins have diode protection to V
Q
Q
R
R
S
S
Special Event Trigger
Special Event Trigger
CCP1M3:CCP1M0
Mode Select
CCP2M3:CCP2M0
Mode Select
Output
Output
Logic
Logic
Advanced Information
DD
and V
Set Flag bit CCP1IF
Set Flag bit CCP2IF
SS
.
match
Match
14.4.2
Timer1 and/or Timer3 must be running in Timer mode
or Synchronized Counter mode, if the CCP module is
using the compare feature. In Asynchronous Counter
mode, the compare operation may not work.
14.4.3
When Generate Software Interrupt is chosen, the
CCP1 pin is not affected. Only a CCP Interrupt is gen-
erated (if enabled).
14.4.4
In this mode, an internal hardware trigger is generated,
which may be used to initiate an action.
The special event trigger output of CCP1 resets the
TMR1 register pair. This allows the CCPR1 register to
effectively be a 16-bit programmable period register for
Timer1.
The special trigger output of CCPx resets either the
TMR1 or TMR3 register pair. Additionally, the CCP2
Special Event Trigger will start an A/D conversion if the
A/D module is enabled.
Note:
T3CCP1
T3CCP2
TMR1H
TIMER1/TIMER3 MODE SELECTION
SOFTWARE INTERRUPT MODE
SPECIAL EVENT TRIGGER
The special event trigger from the CCP2
module will not set the Timer1 or Timer3
interrupt flag bits.
T3CCP2
TMR1L
CCPR1H CCPR1L
CCPR2H CCPR2L
Comparator
Comparator
2000 Microchip Technology Inc.
0
0
1
1
TMR3H
TMR3L
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