PIC18C858-E/PT Microchip Technology, PIC18C858-E/PT Datasheet - Page 64

• Manufacturer Part Number: PIC18C858-E/PT
• Description: IC MCU OTP 16KX16 CAN 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Data Rom Size: 4 KB
• Height: 1 mm
• Length: 12 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 12 mm
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C858E/PT

PIC18CXX8
4.13.1
The Reset Control (RCON) register contains flag bits
that allow differentiation between the sources of a
device RESET. These flags include the TO, PD, POR,
BOR and RI bits. This register is readable and writable.
REGISTER 4-3:
DS30475A-page 64
RCON REGISTER
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON REGISTER
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (16CXXX compatibility mode)
LWRT: Long Write Enable bit
1 = Enable TBLWT to internal program memory
0 = Disable TBLWT to internal program memory; TBLWT only to external program memory
Unimplemented: Read as '0'
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed
0 = The RESET instruction was executed causing a device RESET
TO: Watchdog Time-out Flag bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down Detection Flag bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = A Power-on Reset has not occurred
0 = A Power-on Reset occurred
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred
0 = A Brown-out Reset occurred
Legend:
R = Readable bit
- n = Value at POR
bit 7
R/W-0
IPEN
Once this bit is set, it can only be cleared by a POR or MCLR Reset
(must be set in software after a Brown-out Reset occurs)
(must be set in software after a Power-on Reset occurs)
(must be set in software after a Brown-out Reset occurs)
R/W-0
LWRT
Advanced Information
U-0
W = Writable bit
’1’ = Bit is set
—
R/W-1
RI
Note 1: If the BOREN configuration bit is set, BOR
2: It is recommended that the POR bit be set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-1
is ’1’ on Power-on Reset. If the BOREN
configuration bit is clear, BOR is unknown
on Power-on Reset.
The BOR status bit is a “don't care” and is
not
brown-out circuit is disabled (the BOREN
configuration bit is clear). BOR must then
be set by the user and checked on subse-
quent RESETs to see if it is clear, indicat-
ing a brown-out has occurred.
after a Power-on Reset has been
detected, so that subsequent Power-on
Resets may be detected.
TO
necessarily
R/W-1
 2000 Microchip Technology Inc.
PD
x = Bit is unknown
predictable
R/W-0
POR
R/W-0
BOR
if
bit 0
the