PIC18C858-E/PT Microchip Technology, PIC18C858-E/PT Datasheet - Page 28
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18C858-E/PT
Manufacturer Part Number
PIC18C858-E/PT
Description
IC MCU OTP 16KX16 CAN 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C858-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
3-Wire, I2C, SPI, USART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
68
Number Of Timers
4 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163007, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
6
Data Rom Size
4 KB
Height
1 mm
Length
12 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
12 mm
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C858E/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C858-E/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18C858-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 28 of 366
- Download datasheet (7Mb)
PIC18CXX8
2.7
When the device executes a SLEEP instruction, the
on-chip clocks and oscillator are turned off and the
device is held at the beginning of an instruction cycle
(Q1 state). With the oscillator off, the OSC1 and OSC2
signals will stop oscillating. Since all the transistor
switching currents have been removed, SLEEP mode
achieves the lowest current consumption of the device
(only leakage currents). Enabling any on-chip feature
that will operate during SLEEP will increase the current
consumed during SLEEP. The user can wake from
SLEEP through external RESET, Watchdog Timer
Reset or through an interrupt.
TABLE 2-3:
DS30475A-page 28
RC
RCIO
ECIO
EC
LP, XT, and HS
Note:
OSC Mode
Effects of SLEEP Mode on the
On-chip Oscillator
See Table 3-1 in Section 3.0 RESET, for time-outs due to SLEEP and MCLR Reset.
OSC1 AND OSC2 PIN STATES IN SLEEP MODE
Floating, external resistor should pull high
Floating, external resistor should pull high
Floating
Floating
Feedback inverter disabled, at quiescent
voltage level
Advanced Information
OSC1 Pin
2.8
Power up delays are controlled by two timers, so that
no external RESET circuitry is required for most appli-
cations. The delays ensure that the device is kept in
RESET until the device power supply and clock are sta-
ble. For additional information on RESET operation,
see Section 3.0 RESET.
The first timer is the Power-up Timer (PWRT), which
optionally provides a fixed delay of T
#33) on power-up only (POR and BOR). The second
timer is the Oscillator Start-up Timer (OST), intended to
keep the chip in RESET until the crystal oscillator is
stable.
With the PLL enabled (HS4 oscillator mode), the
time-out sequence following a Power-on Reset is differ-
ent from other oscillator modes. The time-out sequence
is as follows: the PWRT time-out is invoked after a POR
time delay has expired, then the Oscillator Start-up
Timer (OST) is invoked. However, this is still not a suf-
ficient amount of time to allow the PLL to lock at high
frequencies. The PWRT timer is used to provide an
additional time-out. This time is called T
#7) to allow the PLL ample time to lock to the incoming
clock frequency.
Power-up Delays
Configured as PORTA, bit 6
At logic low
Configured as PORTA, bit 6
At logic low
Feedback inverter disabled, at quiescent
voltage level
2000 Microchip Technology Inc.
OSC2 Pin
PWRT
PLL
(parameter
(parameter
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