PIC32MX795F512L-80I/PF Microchip Technology, PIC32MX795F512L-80I/PF Datasheet - Page 167

IC MCU 32BIT 512KB FLASH 100TQFP

PIC32MX795F512L-80I/PF

Manufacturer Part Number
PIC32MX795F512L-80I/PF
Description
IC MCU 32BIT 512KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX795F512L-80I/PF

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Controller Family/series
PIC32
Ram Memory Size
128KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
CAN, I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC32MX7xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Quantity
Price
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Part Number:
PIC32MX795F512L-80I/PF
0
29.0
The PIC32MX5XX/6XX/7XX family instruction set com-
plies with the MIPS32 Release 2 instruction set archi-
tecture. PIC32MX does not support the following
features:
• CoreExtend instructions
• Co-processor 1 instructions
• Co-processor 2 instructions
TABLE 29-1:
 2009 Microchip Technology Inc.
ADD
ADDI
ADDIU
ADDU
AND
ANDI
B
BAL
BEQ
BEQL
BGEZ
BGEZAL
BGEZALL
BGEZL
BGTZ
BGTZL
BLEZ
Note 1:
Instruction
INSTRUCTION SET
This instruction is deprecated and should not be used.
Integer Add
Integer Add Immediate
Unsigned Integer Add Immediate
Unsigned Integer Add
Logical AND
Logical AND Immediate
Unconditional Branch
(Assembler idiom for: BEQ r0, r0, offset)
Branch and Link
(Assembler idiom for: BGEZAL r0, offset)
Branch On Equal
Branch On Equal Likely
Branch on Greater Than or Equal To Zero
Branch on Greater Than or Equal To Zero And Link
Branch on Greater Than or Equal To Zero And Link Likely
Branch on Greater Than or Equal To Zero Likely
Branch on Greater Than Zero
Branch on Greater Than Zero Likely
Branch on Less Than or Equal to Zero
MIPS32
®
INSTRUCTION SET
Description
(1)
Preliminary
(1)
PIC32MX5XX/6XX/7XX
Table 29-1 provides a summary of the instructions that
are implemented by the PIC32MX5XX/6XX/7XX family
core.
(1)
Note:
(1)
Refer to “MIPS32
grammers Volume II: The MIPS32
Instruction Set” at www.mips.com for more
information.
Rd = Rs + Rt
Rt = Rs + Immed
Rt = Rs +
Rd = Rs +
Rd = Rs & Rt
Rt = Rs & (0
PC += (int)offset
GPR[31] = PC + 8
PC += (int)offset
if Rs == Rt
if Rs == Rt
else
if !Rs[31]
GPR[31] = PC + 8
if !Rs[31]
GPR[31] = PC + 8
if !Rs[31]
else
if !Rs[31]
else
if !Rs[31] && Rs != 0
if !Rs[31] && Rs != 0
else
if Rs[31] || Rs == 0
PC += (int)offset
PC += (int)offset
Ignore Next Instruction
PC += (int)offset
PC += (int)offset
PC += (int)offset
Ignore Next Instruction
PC += (int)offset
Ignore Next Instruction
PC += (int)offset
PC += (int)offset
Ignore Next Instruction
PC += (int)offset
U
U
Immed
Rt
Function
16
®
Architecture for Pro-
|| Immed)
DS61156B-page 167
®

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