PIC32MX795F512L-80I/PF Microchip Technology, PIC32MX795F512L-80I/PF Datasheet - Page 83

IC MCU 32BIT 512KB FLASH 100TQFP

PIC32MX795F512L-80I/PF

Manufacturer Part Number
PIC32MX795F512L-80I/PF
Description
IC MCU 32BIT 512KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX795F512L-80I/PF

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Controller Family/series
PIC32
Ram Memory Size
128KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
CAN, I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC32MX7xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX795F512L-80I/PF
Manufacturer:
TOSHIBA
Quantity:
4 600
Part Number:
PIC32MX795F512L-80I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC32MX795F512L-80I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC32MX795F512L-80I/PF
0
TABLE 4-24:
TABLE 4-25:
Legend:
Note
Legend:
Note
6000
6010
6020
6030
6040
6050
6060
6070
PORTA
PORTB
1:
1:
TRISA
ODCA
TRISB
ODCB
LATA
LATB
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORT A REGISTER MAP FOR PIC32MX575F256L, PIC32MX575F512L, PIC32MX675F512L, PIC32MX695F512L, AND
PIC32MX795F512L DEVICES
PORT B REGISTER MAP
TRISA15
ODCA15
TRISB15
ODCB15
LATA15
LATB15
31/15
RA15
31/15
RB15
TRISA14
ODCA14
TRISB14
ODCB14
LATA14
LATB14
30/14
RA14
30/14
RB14
TRISB13
ODCB13
LATB13
29/13
29/13
RB13
TRISB12
ODCB12
LATB12
28/12
28/12
RB12
(1)
(1)
TRISB11
ODCB11
LATB11
27/11
27/11
RB11
TRISA10
ODCA10
TRISB10
ODCB10
LATA10
LATB10
26/10
RA10
26/10
RB10
TRISA9
ODCA9
TRISB9
ODCB9
LATA9
LATB9
25/9
RA9
25/9
RB9
TRISB8
ODCB8
LATB8
24/8
24/8
RB8
Bits
Bits
TRISA7
ODCA7
TRISB7
ODCB7
LATA7
LATB7
23/7
RA7
23/7
RB7
TRISA6
ODCA6
TRISB6
ODCB6
LATA6
LATB6
22/6
RA6
22/6
RB6
TRISA5
ODCA5
TRISB5
ODCB5
LATA5
LATB5
21/5
RA5
21/5
RB5
TRISA4
ODCA4
TRISB4
ODCB4
LATA4
LATB4
20/4
RA4
20/4
RB4
TRISA3
ODCA3
TRISB3
ODCB3
LATA3
LATB3
19/3
RA3
19/3
RB3
TRISA2
ODCA2
TRISB2
ODCB2
LATA2
LATB2
18/2
RA2
18/2
RB2
TRISA1
ODCA1
TRISB1
ODCB1
LATA1
LATB1
17/1
RA1
17/1
RB1
TRISA0
ODCA0
TRISB0
ODCB0
LATA0
LATB0
16/0
RA0
16/0
RB0
0000
C6FF
0000
xxxx
0000
xxxx
0000
0000
0000
FFFF
0000
xxxx
0000
xxxx
0000
0000

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