ATSAM3S4CA-CU Atmel, ATSAM3S4CA-CU Datasheet - Page 235

• Manufacturer Part Number: ATSAM3S4CA-CU
• Description: IC MCU 32BIT 256KB FLASH 100BGA
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Package: 100LFBGA
• Device Core: ARM Cortex M3
• Family Name: AT91
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 79
• Interface Type: I2C/I2S/SPI/UART/USART/USB
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Number Of Timers: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13. Real-time Timer (RTT)
13.1
13.2
13.3
Figure 13-1. Real-time Timer
6500C–ATARM–8-Feb-11
SLCK
RTT_MR
Description
Embedded Characteristics
Block Diagram
RTTRST
reload
Divider
16-bit
RTT_MR
RTPRES
The Real-time Timer is built around a 32-bit counter used to count roll-over events of the 16-bit
prescaler which size enables to count elapsed seconds from a 32 kHz slow clock source. It gen-
erates a periodic interrupt and/or triggers an alarm on a programmed value.
Alarm register capable to generate a wake-up of the system through the Shut Down Controller
• Real-time Timer, allowing backup of time with different accuracies
RTT_VR
– 32-bit free-running back-up counter
– Integrates a 16-bit programmable prescaler running on slow clock
RTT_AR
RTT_MR
RTTRST
0
1
Counter
CRTV
32-bit
ALMV
0
RTT_SR
RTT_SR
RTT_SR
=
read
reset
reset
set
set
RTTINC
ALMS
SAM3S Preliminary
RTTINCIEN
RTT_MR
RTT_MR
ALMIEN
rtt_alarm
rtt_int
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