ATSAM3S4CA-CU Atmel, ATSAM3S4CA-CU Datasheet - Page 88

• Manufacturer Part Number: ATSAM3S4CA-CU
• Description: IC MCU 32BIT 256KB FLASH 100BGA
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Package: 100LFBGA
• Device Core: ARM Cortex M3
• Family Name: AT91
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 79
• Interface Type: I2C/I2S/SPI/UART/USART/USB
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Number Of Timers: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.12.1
10.12.1.1
10.12.1.2
10.12.1.3
10.12.1.4
10.12.1.5
88
ADR
SAM3S Preliminary
ADR
Syntax
Operation
Restrictions
Condition flags
Examples
R1, TextMessage
Load PC-relative address.
where:
cond
Rd
label
ADR determines the address by adding an immediate value to the PC, and writes the result to
the destination register.
ADR produces position-independent code, because the address is PC-relative.
If you use ADR to generate a target address for a BX or BLX instruction, you must ensure that
bit[0] of the address you generate is set to1 for correct execution.
Values of label must be within the range of − 4095 to +4095 from the address in the PC.
You might have to use the .W suffix to get the maximum offset range or to generate addresses
that are not word-aligned. See
Rd must not be SP and must not be PC.
This instruction does not change the flags.
ADR{cond} Rd, label
is an optional condition code, see
is the destination register.
is a PC-relative expression. See
; Write address value of a location labelled as
; TextMessage to R1
“Instruction width selection” on page
“PC-relative expressions” on page
“Conditional execution” on page
86.
6500C–ATARM–8-Feb-11
84.
84.