ATSAM3S4CA-CU Atmel, ATSAM3S4CA-CU Datasheet - Page 721

IC MCU 32BIT 256KB FLASH 100BGA

ATSAM3S4CA-CU

Manufacturer Part Number
ATSAM3S4CA-CU
Description
IC MCU 32BIT 256KB FLASH 100BGA
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S4CA-CU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
79
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 16x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Package
100LFBGA
Device Core
ARM Cortex M3
Family Name
AT91
Maximum Speed
64 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
79
Interface Type
I2C/I2S/SPI/UART/USART/USB
On-chip Adc
16-chx12-bit
On-chip Dac
2-chx12-bit
Number Of Timers
6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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• SYNC: Synchronous Mode Select
0: USART operates in Asynchronous Mode.
1: USART operates in Synchronous Mode.
• CPHA: SPI Clock Phase
CPHA = 0: Data is changed on the leading edge of SPCK and captured on the following edge of SPCK.
CPHA = 1: Data is captured on the leading edge of SPCK and changed on the following edge of SPCK.
CPHA determines which edge of SPCK causes data to change and which edge causes data to be captured. CPHA is used
with CPOL to produce the required clock/data relationship between master and slave devices.
• PAR: Parity Type
• NBSTOP: Number of Stop Bits
• CHMODE: Channel Mode
• MSBF: Bit Order
0: Least Significant Bit is sent/received first.
1: Most Significant Bit is sent/received first.
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
Value
0
1
2
3
– Applicable if USART operates in SPI Mode (USART_MODE = 0xE or 0xF):
Value
Value
0
1
2
1
2
3
0
1
2
3
4
6
REMOTE_LOOPBACK
LOCAL_LOOPBACK
AUTOMATIC
MULTIDROP
NORMAL
1_5_BIT
Name
Name
1_BIT
2_BIT
SPACE
MARK
Name
EVEN
6_BIT
7_BIT
8_BIT
ODD
NO
Description
1 stop bit
1.5 stop bit (SYNC = 0) or reserved (SYNC = 1)
2 stop bits
Description
Even parity
Odd parity
Parity forced to 0 (Space)
Parity forced to 1 (Mark)
No parity
Multidrop mode
Character length is 6 bits
Character length is 7 bits
Character length is 8 bits
Description
Normal Mode
Automatic Echo. Receiver input is connected to the TXD pin.
Local Loopback. Transmitter output is connected to the Receiver Input.
Remote Loopback. RXD pin is internally connected to the TXD pin.
SAM3S Preliminary
SAM3S Preliminary
721
721

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