ATSAM3U2EA-CU Atmel, ATSAM3U2EA-CU Datasheet - Page 119

• Manufacturer Part Number: ATSAM3U2EA-CU
• Description: IC MCU 32BIT 128KB FLSH 144LFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U2EA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b, 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 36 KB
• Interface Type: 4xUSART, 2xTWI, 5xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13.12 General data processing instructions
6430D–ATARM–25-Mar-11
Table 13-20
Table 13-20. Data processing instructions
Mnemonic
ADC
ADD
ADDW
AND
ASR
BIC
CLZ
CMN
CMP
EOR
LSL
LSR
MOV
MOVT
MOVW
MVN
ORN
ORR
RBIT
REV
REV16
REVSH
ROR
shows the data processing instructions:
Brief description
Add with Carry
Add
Add
Logical AND
Arithmetic Shift Right
Bit Clear
Count leading zeros
Compare Negative
Compare
Exclusive OR
Logical Shift Left
Logical Shift Right
Move
Move Top
Move 16-bit constant
Move NOT
Logical OR NOT
Logical OR
Reverse Bits
Reverse byte order in a word
Reverse byte order in each halfword
Reverse byte order in bottom halfword and
sign extend
Rotate Right
See
“ADD, ADC, SUB, SBC, and RSB” on
page 121
“ADD, ADC, SUB, SBC, and RSB” on
page 121
“ADD, ADC, SUB, SBC, and RSB” on
page 121
“AND, ORR, EOR, BIC, and ORN” on
page 124
“ASR, LSL, LSR, ROR, and RRX” on page
126
“AND, ORR, EOR, BIC, and ORN” on
page 124
“CLZ” on page 128
“CMP and CMN” on page 129
“CMP and CMN” on page 129
“AND, ORR, EOR, BIC, and ORN” on
page 124
“ASR, LSL, LSR, ROR, and RRX” on page
126
“ASR, LSL, LSR, ROR, and RRX” on page
126
“MOV and MVN” on page 130
“MOVT” on page 132
“MOV and MVN” on page 130
“MOV and MVN” on page 130
“AND, ORR, EOR, BIC, and ORN” on
page 124
“AND, ORR, EOR, BIC, and ORN” on
page 124
“REV, REV16, REVSH, and RBIT” on
page 133
“REV, REV16, REVSH, and RBIT” on
page 133
“REV, REV16, REVSH, and RBIT” on
page 133
“REV, REV16, REVSH, and RBIT” on
page 133
“ASR, LSL, LSR, ROR, and RRX” on page
126
SAM3U Series
119