ATSAM3U2EA-CU Atmel, ATSAM3U2EA-CU Datasheet - Page 838

• Manufacturer Part Number: ATSAM3U2EA-CU
• Description: IC MCU 32BIT 128KB FLSH 144LFBGA
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U2EA-CU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b, 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 36 KB
• Interface Type: 4xUSART, 2xTWI, 5xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

37.13.6
Name:
Address:
Access:
This register is write-protected while CMDRDY is 0 in HSMCI_SR. If an Interrupt command is sent, this register is only
writeable by an interrupt response (field SPCMD). This means that the current command execution cannot be interrupted
or modified.
• CMDNB: Command Number
This is the command index.
• RSPTYP: Response Type
• SPCMD: Special Command
838
Value
Value
31
23
15
–
–
–
7
0
1
2
3
0
1
2
3
4
SAM3U Series
HSMCI Command Register
RSPTYP
NORESP
136_BIT
30
22
14
CE_ATA
IT_CMD
48_BIT
HSMCI_CMDR
0x40000014
Write-only
–
–
–
6
Name
Name
SYNC
R1B
STD
INIT
Description
Not a special CMD.
Initialization CMD:
74 clock cycles for initialization sequence.
Synchronized CMD:
Wait for the end of the current data block transfer before sending the pending command.
CE-ATA Completion Signal disable Command.
The host cancels the ability for the device to return a command completion signal on the
command line.
Interrupt command:
Corresponds to the Interrupt Mode (CMD40).
Description
No response.
48-bit response.
136-bit response.
R1b response type
29
21
13
–
–
5
MAXLAT
TRTYP
28
20
12
–
4
BOOT_ACK
OPDCMD
27
19
11
3
CMDNB
ATACS
TRDIR
26
18
10
2
SPCMD
25
17
9
1
IOSPCMD
6430D–ATARM–25-Mar-11
TRCMD
24
16
8
0