P80C557E4EFB/01,55 NXP Semiconductors, P80C557E4EFB/01,55 Datasheet - Page 10

• Manufacturer Part Number: P80C557E4EFB/01,55
• Description: IC 80C51 MCU 1024 ROMLESS 80QFP
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C557E4EFB/01,55

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 935263156557; P80C557E4FB; P80C557E4FB

1. ARD (AUX-RAM Disable) is a bit in the Special Function Register PCON
Philips Semiconductors
6.2.2.1 AUX-RAM Page Register XRAMP
The AUX-RAM Page Register is used to select one of three 256
bytes pages of the internal 768 bytes AUX-RAM for
MOVX-accesses via R0 or R1. Its reset value is (XXXXXX00).
Table 3. Description of XRAMP Bits
Table 4. Memory Locations for All Possible MOVX Accesses
NOTE:
1999 Mar 02
BIT
XRAMP.2–7
XRAMP.1
XRAMP.0
0
0
0
0
1
0
1
ARD
Single-chip 8-bit microcontroller
1
XRAMP (FAH)
x: undefined during read, a write operation must write “0” to these locations
SYMBOL
XRAMPx
XRAMP1
XRAMP0
XRAMP1
0
0
1
1
X
X
X
MOVX @Ri, A
MOVX A, @Ri
Figure 5. Indirect addressing of AUX-RAM (768 Bytes), ARD bit in PCON = 0
FUNCTION
reserved for future use
AUX-RAM page select bit 1
AUX-RAM page select bit 0
7
x
XRAMP0
0
1
0
1
X
X
X
255
255
255
0
0
0
6
x
Figure 6. AUX-RAM page register.
(XRAMP) = 02 H
(XRAMP) = 01 H
(XRAMP) = 00 H
5
x
MOVX @Ri,A and MOVX A,@Ri instructions access:
AUX-RAM
AUX-RAM
AUX-RAM
no valid memory access; reserved for future use
External RAM locations
MOVX @DPTR,A and MOVX A,@DPTR instructions access:
AUX-RAM
External RAM locations 768 .. 65535
External RAM locations
10
4
x
P83C557E4/P80C557E4/P89C557E4
locations
locations 256 .. 511
locations 512 .. 767
locations
x
3
767
256
255
512
511
0 .. 255 (reset condition)
0 .. 767 (reset condition)
0
0 .. 255
0 .. 65535
MOVX @DPTR,A
MOVX A,@DPTR
2
x
XRAMP1
1
Product specification
XRAMP0
0