P80C557E4EFB/01,55 NXP Semiconductors, P80C557E4EFB/01,55 Datasheet - Page 57
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P80C557E4EFB/01,55
Manufacturer Part Number
P80C557E4EFB/01,55
Description
IC 80C51 MCU 1024 ROMLESS 80QFP
Manufacturer
NXP Semiconductors
Series
80Cr
Datasheet
1.P80C557E4EFB0155.pdf
(72 pages)
Specifications of P80C557E4EFB/01,55
Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
40
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
P80C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
40
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
935263156557
P80C557E4FB
P80C557E4FB
P80C557E4FB
P80C557E4FB
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P80C557E4EFB/01,55
Manufacturer:
IR
Quantity:
20
Company:
Part Number:
P80C557E4EFB/01,55
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
FEEPROM PROGRAMMING AND VERIFICATION CHARACTERISTICS
T
1999 Mar 02
amb
SYMBOL
Single-chip 8-bit microcontroller
1/t
t
t
t
t
t
t
t
t
t
t
t
AVWL
WHAX
DVWL
WHDX
EHWL
WHEL
WLWHp
WLWHe
AVQV
ELQV
EHQZ
P1.0–P1.7
P2.0–P2.5
P0.0–P0.7
= –40 C to +85 C, V
CLK
ALE/WE
P2.7
ENABLE
P3.4
System clock frequency (standard oscillator)
Address setup to WE LOW
Address hold after WE HIGH
Data setup to WE LOW
Data hold after WE HIGH
P2.7 (ENABLE) HIGH to WE LOW
WE HIGH to P2.7 (ENABLE) LOW
WE width (programming)
WE width (erase)
Address to data valid
P2.7 (ENABLE) Low to data valid
Data float after P2.7 (ENABLE) HIGH
DD
t
EHWL
= 5 V
* For ERASE conditions see Figure 50.
Figure 53. FEEPROM Programming/Erase and Verification Waveforms
For PROGRAM conditions see Figure 51.
For VERIFY conditions see Figure 52.
ADDRESS (programming)
PROGRAMMING*/Erase*
t
10%, V
PARAMETER
AVWL
t
DVWL
(programing)
DATA IN
SS
= 0 V (see Figure 53)
t
WHDX
t
t
WLWHe
WLWHp
t
WHAX
t
WHEL
57
P83C557E4/P80C557E4/P89C557E4
t
ELQV
48t
48t
48t
48t
48t
48t
2.25
MIN
t
4.5
AVQV
4
–
–
0
CLK
CLK
CLK
CLK
CLK
CLK
VERIFICATION*
DATA OUT
ADDRESS
48t
48t
48t
MAX
2.75
5.5
6
–
–
–
–
–
–
CLK
CLK
CLK
t
EHQZ
Product specification
UNIT
MHz
ms
ms