ST72F63BK2U1TR STMicroelectronics, ST72F63BK2U1TR Datasheet - Page 45

• Manufacturer Part Number: ST72F63BK2U1TR
• Description: IC MCU 8BIT 8K FLASH 40-QFN
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F63BK2U1TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-QFN
• Processor Series: ST72F6x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 8 Channel / 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST7263Bxx
9.3
9.3.1
Figure 22. PA0, PA3, PA4, PA5, PA6, PA7 and PD[7:4] configuration
ALTERNATE INPUT
I/O port implementation
The hardware implementation on each I/O port depends on the settings in the DDR register
and specific feature of the I/O port such as ADC input or true open drain.
Port A
Table 11.
1. Reset state.
2. Not available on SO24
PA0
PA3
PA4
PA5
PA6
PA7
PORT A
(2)
DR SEL
DDR SEL
LATCH
LATCH
with pull-up
with pull-up
with pull-up
with pull-up
with pull-up
with pull-up
DDR
DR
Port A0, A3, A4, A5, A6, A7 description
Input
ALTERNATE
OUTPUT
(1)
1
0
I/Os
1
push-pull
push-pull
Push-pull
Push-pull
Push-pull
Push-pull
0
Output
Doc ID 7516 Rev 8
ALTERNATE ENABLE
ALTERNATE ENABLE
ALTERNATE ENABLE
MCO (Main Clock output)
Timer EXTCLK
Timer ICAP1
IT1 Schmitt triggered input IT1E = 1 (ITIFRE)
Timer ICAP2
IT2 Schmitt triggered input IT2E = 1 (ITIFRE)
Timer OCMP1
IT3 Schmitt triggered input IT3E = 1 (ITIFRE)
Timer OCMP2
IT4 Schmitt triggered input IT4E = 1 (ITIFRE)
CMOS SCHMITT TRIGGER
Signal
PULL-UP
Alternate function
V
SS
V
N-BUFFER
P-BUFFER
DD
MCO = 1 (MISCR)
CC1 =1
CC0 = 1 (Timer CR2)
OC1E = 1
OC2E = 1
V
DD
Condition
DIODES
PAD
I/O ports
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