ST72F63BK2U1TR STMicroelectronics, ST72F63BK2U1TR Datasheet - Page 69

IC MCU 8BIT 8K FLASH 40-QFN

ST72F63BK2U1TR

Manufacturer Part Number
ST72F63BK2U1TR
Description
IC MCU 8BIT 8K FLASH 40-QFN
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F63BK2U1TR

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-QFN
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SCI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 8 Channel / 8 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
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Quantity
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Part Number:
ST72F63BK2U1TR
Manufacturer:
ST
0
ST7263Bxx
Note:
1
2
3
4
5
The OC1R register value required for a specific timing application can be calculated using
the following formula:
Where:
t = Pulse period (in seconds)
f
PRESC
If the timer clock is an external clock the formula is:
Where:
t = Pulse period (in seconds)
f
When the value of the counter is equal to the value of the contents of the OC1R register, the
OLVL1 bit is output on the OCMP1 pin, (See
The OCF1 bit cannot be set by hardware in One Pulse mode but the OCF2 bit can generate
an output Compare interrupt.
When the Pulse Width Modulation (PWM) and One Pulse mode (OPM) bits are both set, the
PWM mode is the only active one.
If OLVL1 = OLVL2 a continuous signal will be seen on the OCMP1 pin.
The ICAP1 pin can not be used to perform input capture. The ICAP2 pin can be used to
perform input capture (ICF2 can be set and IC2R can be loaded) but the user must take
care that the counter is reset each time a valid edge occurs on the ICAP1 pin and ICF1 can
also generates interrupt if ICIE is set.
When One Pulse mode is used OC1R is dedicated to this mode. Nevertheless OC2R and
OCF2 can be used to indicate a period of time has been elapsed but cannot generate an
output waveform because the level OLVL2 is dedicated to the One Pulse mode.
Figure 38. One Pulse mode timing example
1. IEDG1 = 1, OC1R = 2ED0h, OLVL1 = 0, OLVL2 = 1
CPU
EXT
= External timer clock frequency (in hertz)
= CPU clock frequency (in hertz)
= Timer prescaler factor (2, 4 or 8 depending on the CC[1:0] bits, see
COUNTER
OCMP1
ICAP1
IC1R
01F8
FFFC FFFD FFFE
Doc ID 7516 Rev 8
OCiR Value =
OLVL2
OCiR =
t
*
Figure
01F8
f
EXT
PRESC
t
*
f
compare1
CPU
2ED0 2ED1 2ED2
-5
38).
- 5
OLVL1
2ED3
FFFC FFFD
2ED3
On-chip peripherals
OLVL2
Table
24)
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