Z8F0813HJ005EG Zilog, Z8F0813HJ005EG Datasheet - Page 44

• Manufacturer Part Number: Z8F0813HJ005EG
• Description: IC Z8 ENCORE MCU FLASH 8K 28SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0813HJ005EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 269-4182; Z8F0813HJ005EG

Reset Register Definitions
BITS
FIELD
RESET
R/W
ADDR
PS025203-0405
Reset or STOP Mode Recovery Event
Power-On Reset
Reset using RESET pin assertion
Reset using Watch-Dog Timer time-out
Reset using the On-Chip Debugger (OCTCTL[1] set to 1)
Reset from STOP Mode using DBG Pin driven Low
STOP Mode Recovery using GPIO pin transition
STOP Mode Recovery using Watch-Dog Timer time-out
STOP Mode Recovery Using the External RESET Pin
Reset Status Register
POR
R
7
When the Z8 Encore!
pin is driven Low, a system reset occurs. Because of a glitch filter operating on the RESET
pin, the Low pulse must be greater than the minimum width specified, or it is ignored. See
“Electrical Characteristics” on page 176
The Reset Status (RSTSTAT) register is a read-only register that indicates the source of
the most recent Reset event, indicates a STOP Mode Recovery event, and indicates a
Watch-Dog Timer time-out. Reading this register resets the upper four bits to 0.
This register shares its address with the Watch-Dog Timer control register, which is write-
only (Table 12).
POR—Power-On Reset Indicator
If this bit is set to 1, a Power-On Reset event occurred. This bit is reset to 0 if a WDT time-
out or STOP Mode Recovery occurs. This bit is also reset to 0 when the register is read.
STOP—STOP Mode Recovery Indicator
If this bit is set to 1, a STOP Mode Recovery occurred. If the STOP and WDT bits are both
See descriptions below
STOP
R
6
Table 12. Reset Status Register (RSTSTAT)
®
WDT
R
5
Z8F0823 Series device is in STOP Mode and the external RESET
P R E L I M I N A R Y
EXT
R
0
4
FF0H
for details.
R
3
0
POR
1
0
0
1
1
0
0
Z8 Encore!
R
0
2
Reset and STOP Mode Recovery
Reserved
STOP
Product Specification
0
0
0
0
0
1
1
®
R
1
0
Z8F0823 Series
WDT
0
0
1
0
0
0
1
EXT
R
0
0
0
1
0
0
0
0
0
27