Z8F0813HJ005EG Zilog, Z8F0813HJ005EG Datasheet - Page 59

IC Z8 ENCORE MCU FLASH 8K 28SSOP

Z8F0813HJ005EG

Manufacturer Part Number
Z8F0813HJ005EG
Description
IC Z8 ENCORE MCU FLASH 8K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0813HJ005EG

Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-4182
Z8F0813HJ005EG
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS025203-0405
Caution:
POC7
R/W
AF7
If 02H in Port A–C Address Register, accessible through the Port A–C Control Register
If 03H in Port A–C Address Register, accessible through the Port A–C Control Register
0
7
7
AF[7:0]—Port Alternate Function enabled
0 = The port pin is in normal mode and the DDx bit in the Port A–C Data Direction sub-
register determines the direction of the pin.
1 = The alternate function selected through Alternate Function Set sub-registers is
enabled. Port pin operation is controlled by the alternate function.
Port A–C Output Control Sub-Registers
The Port A–C Output Control sub-register (Table 22) is accessed through the Port A–C
Control register by writing
Port A–C Output Control sub-registers to 1 configures the specified port pins for open-
drain operation. These sub-registers affect the pins directly and, as a result, alternate func-
tions are also affected.
POC[7:0]—Port Output Control
These bits function independently of the alternate function bit and always disable the
drains if set to 1.
0 = The drains are enabled for any output mode (unless overridden by the alternate func-
tion).
1 = The drain of the associated pin is disabled (open-drain mode).
Table 21. Port A–C Alternate Function Sub-Registers (PxAF)
Table 22. Port A–C Output Control Sub-Registers (PxOC)
Do not enable alternate functions for GPIO port pins for which there is no
associated alternate function. Failure to follow this guideline can result in
unpredictable operation.
POC6
R/W
AF6
6
6
0
00H (Ports A–C); 04H (Port A of 8-pin device)
POC5
R/W
AF5
5
5
0
03H
P R E L I M I N A R Y
to the Port A–C Address register. Setting the bits in the
POC4
R/W
AF4
0
4
4
R/W
POC3
R/W
AF3
3
3
0
Z8 Encore!
POC2
R/W
AF2
0
2
2
Product Specification
POC1
®
R/W
AF1
General-Purpose I/O
1
1
0
Z8F0823 Series
POC0
R/W
AF0
0
0
0
42

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