ST7FLITE29F1B6 STMicroelectronics, ST7FLITE29F1B6 Datasheet - Page 99
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ST7FLITE29F1B6
Manufacturer Part Number
ST7FLITE29F1B6
Description
IC MCU 8BIT 8K FLASH 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST7FLITE29F1B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13.4 SUPPLY CURRENT CHARACTERISTICS
The following current consumption specified for
the ST7 functional operating modes over tempera-
ture range does not take into account the clock
source current consumption. To get the total de-
13.4.1 Supply Current
T
Notes:
1. CPU running with memory access, all I/O pins in input mode with a static value at V
in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
2. All I/O pins in input mode with a static value at V
driven by external square wave, LVD disabled.
3. SLOW mode selected with f
V
4. SLOW-WAIT mode selected with f
V
5. All I/O pins in output mode with a static value at V
tested in production at V
6. All I/O pins in input mode with a static value at V
max.
7. This consumption refers to the Halt period only and not the associated run period which is software dependent.
Figure 60. Typical I
Symbol
SS
DD
A
I
DD
= -40 to +85°C unless otherwise specified,
(no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
or V
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
SS
Supply current in RUN mode
Supply current in WAIT mode
Supply current in SLOW mode
Supply current in SLOW WAIT mode
Supply current in HALT mode
Supply current in AWUFH mode
2.0
(no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
2.5
8Mhz
4Mhz
1Mhz
3.0
DD
Parameter
DD
3.5
in RUN vs. f
max and f
Vdd (V)
CPU
4.0
based on f
4.5
CPU
CPU
5)
5.0
CPU
based on f
max.
6)7)
5.5
OSC
divided by 32. All I/O pins in input mode with a static value at V
DD
6.0
DD
External Clock, f
Internal RC, f
f
External Clock, f
Internal RC, f
f
f
f
-40°C≤T
T
T
CPU
CPU
CPU
CPU
SS
A
A
OSC
V
= +125°C
= +25°C
or V
or V
DD
(no load), LVD disabled. Data based on characterization results,
=8MHz
=8MHz
=250kHz
=250kHz
=5.5V
divided by 32. All I/O pins in input mode with a static value at
SS
SS
A
≤+85°C
(no load), all peripherals in reset state; clock input (CLKIN)
(no load). Data tested in production at V
vice consumption, the two current values must be
added (except for HALT mode for which the clock
is stopped).
Figure 61. Typical I
1)
2)
Conditions
CPU
CPU
3)
4)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CPU
CPU
=1MHz
=1MHz
2
=1MHz
=1MHz
2.5
250Khz
125Khz
62.5Hz
1)
2)
3
DD
DD
3.5
or V
in SLOW vs. f
Vdd (V)
1
2.2
7.5
0.8
1.8
3.7
1.6
1.6
1
15
20
SS
4
Typ
(no load), all peripherals
4.5
12
6
2.5
2.5
10
50
30
DD
Max
5
max. and f
CPU
ST7LITE2
5.5
Unit
99/133
mA
µA
DD
6
CPU
or
1