STR912FAW47X6 STMicroelectronics, STR912FAW47X6 Datasheet - Page 20

• Manufacturer Part Number: STR912FAW47X6
• Description: MCU ARM9 2048KB FLASH 128LQFP
• Manufacturer: STMicroelectronics
• Series: STR9r

Specifications of STR912FAW47X6

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Processor Series: STR912x
• Core: ARM966E-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 96 KB
• Interface Type: CAN, I2C, IrDA, SSP, UART, USB
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MCBSTR9, MCBSTR9U, MCBSTR9UME, KSDK-STR912-PLUS, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: STR9
• Device Core: ARM966E-S
• Device Core Size: 16/32Bit
• Frequency (max): 96MHz
• Total Internal Ram Size: 96KB
• # I/os (max): 80
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2/3.6V
• Operating Supply Voltage (min): 1.65/1.77/2.5/2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: LQFP
• For Use With: MCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2MCBSTR9 - BOARD EVAL STM STR9 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-9039; STR912FAW47X6

Functional overview
Table 6.
3.10
3.10.1
20/102
31 (low priority)
IRQ channel
hardware
priority
25
26
27
28
29
30
VIC IRQ channels (continued)
Clock control unit (CCU)
The CCU generates a master clock of frequency f
also generates individually scaled and gated clock sources to each of the following
functional blocks within the STR91xFA.
●
●
●
●
●
●
●
Master clock sources
The master clock in the CCU (f
firmware control, the CPU can switch between the three CCU inputs without introducing any
glitches on the master clock output. Inputs to the CCU are:
●
●
●
VIC input
channel
VIC1.10
VIC1.11
VIC1.12
VIC1.13
VIC1.14
VIC1.15
CPU, f
Advanced High-performance Bus (AHB), f
Advanced Peripheral Bus (APB), f
Flash Memory Interface (FMI), f
External Memory Interface (EMI), f
UART Baud Rate Generators, f
USB, f
Main Oscillator (f
crystal connected to STR91xFA pins X1_CPU and X2_CPU, or an external oscillator
device connected to pin X1_CPU.
PLL (f
master clock output up to 96 MHz (programmable). By default, at power-up the master
clock is sourced from the main oscillator until the PLL is ready (locked) and then the
CPU may switch to the PLL source under firmware control. The CPU can switch back to
the main oscillator source at any time and turn off the PLL for low-power operation. The
PLL is always turned off in Sleep mode.
RTC (f
X2_RTC, or an external oscillator connected to pin X1_RTC to constantly run the real-
time clock unit. This 32.768 kHz clock source can also be used as an input to the CCU
to run the CPU in slow clock mode for reduced power.
VIC1.9
PLL
USB
CPUCLK
RTC
). The PLL takes the 4 to 25 MHz oscillator clock as input and generates a
Wake-up Group 0
Wake-up Group 1
Wake-up Group 2
Wake-up Group 3
). A 32.768 kHz external crystal can be connected to pins X1_RTC and
Wake-Up (all)
Logic block
PFQ-BC
USB
OSC
). The source for the main oscillator input is a 4 to 25 MHz external
MSTR
Doc ID 13495 Rev 6
Logic OR of 8 interrupt sources: RTC, USB Resume, pins P3.2 to
Special use of interrupts from Prefetch Queue and Branch Cache
Logic OR of all 32 inputs of Wake-Up unit (30 pins, RTC, and
) is derived from one of three clock input sources. Under
BAUD
FMICLK
USB Bus Resume Wake-up (also input to wake-up unit)
PCLK
BCLK
Logic OR of 8 interrupts from pins P5.0 to P5.7
Logic OR of 8 interrupts from pins P6.0 to P6.7
Logic OR of 8 interrupts from pins P7.0 to P7.7
HCLK
MSTR
Interrupt source
. From this master clock the CCU
USB Resume)
P3.7
STR91xFAxxx