ST10F273M-4T3 STMicroelectronics, ST10F273M-4T3 Datasheet - Page 11

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ST10F273M-4T3

Manufacturer Part Number
ST10F273M-4T3
Description
MCU 16BIT 512K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F273M-4T3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST10F273M
1
1.1
1.2
1.2.1
1.2.2
Introduction
Description
The ST10F273M device is a new derivative of the STMicroelectronics ST10 family of 16-bit
single-chip CMOS microcontrollers.
The ST10F273M combines high CPU performance (up to 20 million instructions per second)
with high peripheral functionality and enhanced I/O capabilities. It also provides on-chip
high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation
via PLL.
The ST10F273M is processed in 0.18mm CMOS technology. The MCU core and the logic is
supplied with a 5V to 1.8V on-chip voltage regulator. The part is supplied with a single 5V
supply and I/Os work at 5V.
The ST10F273M is an optimized version of the ST10F273E, upward compatible with the
following set of differences:
Special characteristics
X-Peripheral clock gating
This new feature have been implemented on the ST10F273M: Once the EINIT instruction
has been executed, only the X-Peripherals enabled in the XPERCON register will be
clocked.
The new feature allows to reduce the power consumption and also should improve the
emissions as it avoids to propagate useless clock signals across the device.
Improved supply ring
An RC filter has been introduced in the 5V power supply ring of the ballast transistor. In
addition, the supply rings for the internal voltage regulators and the IOs have been split.
These two modifications should improve the behavior of the device regarding conducted
emissions.
Maximum CPU frequency is 40 MHz
A single bank of IFlash has been implemented but the programming interface has been
kept compatible with the ST10F273E
Identification registers: the IDMEM register reflects the Flash type difference and allows
to differentiate the two devices by software
Improved EMC behavior thanks to the introduction of an internal RC filter on the 5V for
the ballast transistors
The clock to the X-Peripherals is gated: X-Peripheral not used will not get the clock in
order to reduce the power consumption.
Introduction
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