ST10F273M-4T3 STMicroelectronics, ST10F273M-4T3 Datasheet - Page 44

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ST10F273M-4T3

Manufacturer Part Number
ST10F273M-4T3
Description
MCU 16BIT 512K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F273M-4T3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Internal Flash memory
5.5.10
5.5.11
5.6
Note:
44/182
Table 25.
Write protection
The Flash modules have one level of Write Protections: Each sector can be Software Write
Protected by programming at 0 the related bit WyPx in FNVWPIRL/H register.
Temporary unprotection
Bits WyPx of FNVWPIRL/H can be temporarily unprotected by executing the Set Protection
operation and writing 1 into these bits.
Bit ACCP can be temporarily unprotected by executing the Set Protection operation and
writing are executed from IFlash.
To restore the write access protection bits it is necessary to reset the microcontroller or to
execute a Set Protection operation and write 0 into the desired bits.
In reality, when a temporary unprotection operation is executed, the corresponding volatile
register is written to 1, while the non-volatile registers bits previously written to 0 (for a
protection set operation), will continue to maintain the 0. For this reason, the user software
must be in charge to track the current protection status (for instance using a specific RAM
area), it is not possible to deduce it by reading the non-volatile register content (a temporary
unprotection cannot be detected).
Write operation examples
In the following, examples for each kind of Flash write operation are presented.
The examples are showing the sequence of instructions needed to start an operation. Write
operations should be followed by a status check (FER register).
After a write operation has started, the Flash control registers are not accessible for a short
time. The LOCK bit, bit 4 of FCR0L register, must be polled in order to know when the Flash
control registers can be accessed again (LOCK = ‘1’: no access to Flash control registers).
Write operation on IBus registers is 16 bits wide.
Word program
Example: 32-bit Word Program of data 0xAAAAAAAA at address 0x025554
Fetching from XRAM
Fetching from external
memory
FCR0H|= 0x2000;
FARL = 0x5554;
FARH = 0x0002;
FDR0L = 0xAAAA;
FDR0H = 0xAAAA;
Fetch location
Summary of access protection level (continued)
Jump to IFlash
Read IFlash /
No / Yes
No / Yes
/*Set WPG in FCR0H*/
/*Load Add in FARL*/
/*Load Add in FARH*/
/*Load Data in FDR0L*/
/*Load Data in FDR0H*/
external memory /
Jump to XRAM or
external memory
Read XRAM or
Yes / Yes
Yes / Yes
Read Flash
registers
Yes
Yes
Write Flash
ST10F273M
registers
No
No

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