ST10F273M-4T3 STMicroelectronics, ST10F273M-4T3 Datasheet - Page 45

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ST10F273M-4T3

Manufacturer Part Number
ST10F273M-4T3
Description
MCU 16BIT 512K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F273M-4T3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
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ST10F273M
Double word program
Example: Double Word Program (64-bit) of data 0x55AA55AA at address 0x035558 and
data 0xAA55AA55 at address 0x03555C.
Double Word Program is always performed on the Double Word aligned on an even Word:
bit ADD2 of FARL is ignored.
Sector erase
Example: Sector Erase of sectors B0F1 and B0F0 of Bank 0.
Suspend and resume
Word Program, Double Word Program, and Sector Erase operations can be suspended in
the following way:
Then the operation can be resumed in the following way:
Before resuming a suspended Erase, FCR1H/FCR1L must be read to check if the Erase is
already completed (FCR1H = FCR1L = 0x0000 if Erase is complete). Original setup of
Select Operation bits in FCR0H/L must be restored before the operation resume, otherwise
the operation is aborted and bit RESER of FER is set.
Set protection
Example 1: Enable Write Protection of sectors B0F3-0 of Bank 0.
Example 2: Enable Access and Debug Protection.
FCR0H|= 0x8000;
FCR0H
FARL
FARH
FDR0L
FDR0H
FDR1L
FDR1H
FCR0H
FCR0H
FCR1L
FCR0H
FCR0H
FCR0H
FCR0H
FCR0H
FARL
FARH
FDR0L
FDR0H
FCR0H
FCR0H
|= 0x8000;
|= 0x0800;
|= 0x0003;
|= 0x8000;
|= 0x4000;
|= 0x0800;
|= 0x8000;
|= 0x0100;
|= 0x8000;
|= 0x0100;
|= 0x1000;
= 0x5558;
= 0x0003;
= 0x55AA;
= 0x55AA;
= 0xAA55;
= 0xAA55;
= 0xDFB4;
= 0x000E;
= 0xFFF0;
= 0xFFFF;
/*Operation start*/
/*Set SPR in FCR0H*/
/*Load Add of register FNVWPIR in FARL*/
/*Load Add of register FNVWPIR in FARH*/
/*Load Data in FDR0L*/
/*Load Data in FDR0H*/
/*Operation start*/
/*Set SPR in FCR0H*/
/*Set DWPG in FCR0H*/
/*Load Add in FARL*/
/*Load Add in FARH*/
/*Load Data in FDR0L*/
/*Load Data in FDR0H*/
/*Load Data in FDR1L*/
/*Load Data in FDR1H*/
/*Operation start*/
/*Set SER in FCR0H*/
/*Set B0F1, B0F0*/
/*Operation start*/
/*Set SUSP in FCR0H*/
/*Set SER in FCR0H*/
/*Operation resume*/
Internal Flash memory
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