ST10F273M-4T3 STMicroelectronics, ST10F273M-4T3 Datasheet - Page 110

• Manufacturer Part Number: ST10F273M-4T3
• Description: MCU 16BIT 512K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F273M-4T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Power reduction modes
21.3.1
110/182
In normal running mode (that is, when main V
during reset to exercise the EA functionality associated with the same pin: The voltage
supply for the circuitries which are usually biased with V
oscillator used in conjunction with Real Time Clock module), is granted by the active main
V
It must be noted that Standby mode can generate problems associated with the usage of
different power supplies in CMOS systems; particular attention must be paid when the
ST10F273M I/O lines are interfaced with other external CMOS integrated circuits: If V
ST10F273M becomes (for example, in Standby mode) lower than the output level forced by
the I/O lines of these external integrated circuits, the ST10F273M could be directly powered
through the inherent diode existing on ST10F273M output driver circuitry. The same is valid
for ST10F273M interfaced to active/inactive communication buses during Standby mode:
Current injection can be generated through the inherent diode.
Furthermore, the sequence of turning on/off of the different voltage could be critical for the
system (not only for the ST10F273M device). The device Standby mode current (I
vary while V
V
phenomenon.
Entering standby mode
As already stated, to enter Standby mode the XRAM2EN bit in the XPERCON register must
be cleared: This allows the RAM interface to be frozen immediately, avoiding any data
corruption. As a consequence of a RESET event, the RAM power supply is switched to the
internal low-voltage supply V
regulator). The RAM interface remains frozen until the bit XRAM2EN is set again by
software initialization routine (at next exit from main V
Since V
XRAM2EN bit is no longer able to guarantee its content (logic “0”), being the XPERCON
Register powered by internal V
Standby mode switching dedicated circuit continues to confirm the RAM interface freezing,
irrespective the XRAM2EN bit content; XRAM2EN bit status is considered again when
internal V
If internal V
with bit XRAM2EN set, the RAM Supply switching circuit is not active: in case of a
temporary drop on internal V
no spurious Standby mode switching can occur (the RAM is not frozen and can still be
accessed).
The ST10F273M Core module, generating the RAM control signals, is powered by internal
V
switched to V
from ST10F273M Core (active low signal) is low enough to be recognized as a logic “0” by
the RAM interface (due to V
address for the RAM and an unwanted data corruption could occur. For this reason, an extra
interface, powered by the switched supply, is used to prevent the RAM from this kind of
potential corruption mechanism.
DD
DD
18
.
supply; during turning off transient these control signals follow the V
and V
18
18
is falling down (as a consequence of V
STBY
18
DD
comes back over internal standby reference V
18SB
becomes lower than internal standby reference (V
to V
pins. System noise on both V
internal reference. It could happen that a high level of RAM write strobe
STBY
(and vice versa) transition occurs: Some current flows between
18
18
18SB
lower than V
18
voltage versus internal V
. This does not generate any problem, because the
(derived from V
18SB
DD
DD
): The bus status could contain a valid
and V
is on) the V
DD
STBY
turning off), it can happen that the
DD
STBY
through the low-power voltage
18SB
STBY
power-on reset sequence).
18SB
can contribute to increase this
STBY
during normal code execution,
(see in particular the 32 kHz
.
18SB
pin can be tied to V
) of about 0.3 to 0.45V
18
, while RAM is
ST10F273M
STBY
SS
DD
) may
of