S9S08AW16AE0MFT Freescale Semiconductor, S9S08AW16AE0MFT Datasheet - Page 157

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S9S08AW16AE0MFT

Manufacturer Part Number
S9S08AW16AE0MFT
Description
MCU 16K FLASH AUTO MONET 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of S9S08AW16AE0MFT

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD. POR, PWM, WDT
Number Of I /o
38
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Controller Family/series
HCS08
No. Of I/o's
38
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
S08AW
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AW60E
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Height
1 mm
Length
7 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Chapter 9
Keyboard Interrupt (S08KBIV1)
9.1
The MC9S08AW60 Series has one KBI module with eight keyboard interrupt inputs that are shared with
port D and port G pins. See
hardware aspects of these pins.
9.2
The KBI input KBIP7 shares a common pin with PTD7 and AD15. When KBIP7 is enabled the pin is
forced to its input state regardless of the value of the associated port D data direction bit. The port D pullup
enable is still used to control the pullup resistor and the pin state can be sensed through a read of the port
D data register (this requires that bit 7 of the port D DDR is 0). In the case that the pin is enabled as an
ADC input, both the PTD7 and KBIP7 functions are disabled, including the pullup resistor.
The KBI input KBIP6 shares a common pin with PTD3 and AD11, and KBI input KBIP5 shares a common
pin with PTD2 and AD10. The sharing of each of these inputs with port and ADC functions operates in
the same way as described above for KBIP7.
The KBI inputs KBIP4 – KBIP0 are shared on common pins with PTG4 – PTG0. These pins all operate
in the same way as described above for KBIP7 except that none are shared with an ADC input.
KBIP3 – KBIP0 are always falling-edge/low-level sensitive. KBIP7 – KBIP4 can be configured for
rising-edge/high-level or for falling-edge/low-level sensitivity. When any of the inputs KBIP7 – KBIP0 are
enabled and configured to detect rising edges/high levels, and the pin pullup is enabled through the
corresponding port pullup enable bit for that pin, a pulldown resistor rather than a pullup resistor is enabled
on the pin.
Freescale Semiconductor
1
x = Don’t care
(Pull Enable)
PTxPEn
0
1
x
1
1
0
Introduction
Keyboard Pin Sharing
(Data Direction)
PTxDDn
0
0
1
x
x
x
Chapter 2, “Pins and
Table 9-1. KBI and Parallel I/O Interaction
(KBI Pin Enable)
KBIPEn
MC9S08AW60 Data Sheet, Rev 2
0
0
0
1
1
1
Connections,” for more information about the logic and
(KBI Edge Select)
KBEDGn
x
x
x
0
1
x
1
disabled
disabled
disabled
disabled
enabled
enabled
Pullup
Pulldown
disabled
disabled
disabled
disabled
disabled
enabled
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