S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 107
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S9S12P64J0MFT
Manufacturer Part Number
S9S12P64J0MFT
Description
MCU 64K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P64J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Chapter 3
Memory Map Control (S12PMMCV1)
3.1
The S12PMMC module controls the access to all internal memories and peripherals for the CPU12 and
S12SBDM module. It regulates access priorities and determines the address mapping of the on-chip
ressources.
3.1.1
Freescale Semiconductor
Local Addresses
Global Addresse
Aligned Bus Access
Misaligned Bus Access
NS
SS
Unimplemented Address Ranges
P-Flash
D-Plash
NVM
IFR
(Item No.)
Rev. No.
01.03
01.04
01.05
Introduction
(Submitted By)
Figure 3-1
Glossary
22.APR.2010
10.JAN.2008
13.JAN.2010
Term
Date
shows a block diagram of the S12PMMC module.
Figure 3-2
Sections
Affected
General
General
S12P-Family Reference Manual, Rev. 1.13
Address within the CPU12’s Local Address Map
Address within the Global Address Map
Bus access to an even address.
Bus access to an odd address.
Normal Single-Chip Mode
Special Single-Chip Mode
Address ranges which are not mapped to any on-chip ressource.
Program Flash
Data Flash
Non-volatile Memory; P-Flash or D-Flash
NVM Information Row. Refer to FTMRC Block Guide
Table 3-1. Revision History Table
Table 3-3. Glossary Of Terms
Table 3-2.
Removed references to the MMCCTL1 register
Added reserved registers
Substantial Change(s)
Definition
Minor Changes
(Figure
3-10)
(Figure
3-10)
107
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